Power bridge having a non-dissipative snubber circuit

Claim 2

In a power bridge circuit of the kind including first, second, third and fourth switching power transistors connected to an inductive load, the first and third transistors being connected to opposite sides of the load and arranged to couple an electrical current through the load in a first direction, and the second and fourth transistors likewise being connected to opposite sides of the load and arranged to couple an electrical current through the load in a second, opposite direction, the circuit further including driver means for controllably biasing on the first and third transistors at substantially the same times and the second and fourth transistors at substantially the same times not coincident with the times the first and third transistors are biased on, and first, second, third and fourth capacitors shunting the respective first, second, third and fourth transistors, such that when the driver means biases off each corresponding pair of transistors, electrical current flowing through the inductive load is diverted through the associated pair of capacitors, to charge the capacitors to predetermined voltages, an improvement comprising: first non-dissipative discharge means interconnecting the first and third capacitors, and second non-dissipative discharge means interconnecting the second and fourth capacitors, each of the first and second discharge means discharging its two associated capacitors simultaneously to their original states when the driver means again biases on the associated transistors, each of the first and second discharge means including an inductor, switch means connected in series with the inductor, and actuation means for controllably actuating the switch means when the associated transistors are biased on, to simultaneously discharge the two associated capacitors through the inductor.

Claim 3

A power bridge circuit for driving an inductive load, comprising: first and second switching power transistors connected to the same inductive load, the first transistor being arranged to couple an electrical current through the inductive load in a first direction and the second transistor being arranged to couple an electrical current through the inductive load in a second, opposite direction; driver means for controllably switching on the first and second transistors at independent, non-simultaneous times; first and second snubber capacitors shunting the respective first and second transistors, such that when either transistor is switched off by the driver means, electrical current flowing through the inductive load is diverted through the associated capacitor, to charge the capacitor to a predetermined voltage; and first and second non-dissipative discharge means associated with the respective first and second snubber capacitors, each discharge means for discharging the associated capacitor to its original state when the associated transistor is again switched on by the driver means, and each discharge means including an inductor switch means connected in series with the inductor, a transformer having a plurality winding and a secondary winding, the secondary winding being connected to the switch means, and means for coupling a predetermined drive signal to the primary winding of the transformer only when the associated power transistor is switched off by the driver means, such that when the power transistor is again switched on and the drive signal therefore uncoupled from the primary winding, the magnetic field stored in the transformer collapses, to actuate the switch means, the transformer being sized such that the switch means is actuated for a duration corresponding to about one-half the natural period of the associated inductor and snubber capacitor, such that the switch means discharges the capacitor through the inductor.

Claim 4

A power bridge circuit for driving an inductive load, comprising: first and second switching power transistors connected to the same inductive load, the first transistor being arranged to couple an electrical current through the inductive load in a first direction and the second transistor being arranged to couple an electrical current through the inductive load in a second, opposite direction; driver means for controllably switching on the first and second transistors at independent, non-simultaneous times; first and second snubber capacitors shunting the respective first and second transistors, such that when either transistor is switched off by the driver means, electrical current flowing through the inductive load is diverted through the associated capacitor, to charge the capacitor to a predetermined voltage; and first and second non-dissipative discharge means associated with the respective first and second snubber capacitors, each discharge means for discharging the associated capacitor to its original state when the associated transistor is again switched on by the driver means, and each discharge means including an inductor switch means connected in series with the inductor, a transformer having a plurality winding and a secondary winding, the secondary winding being connected to the switch means, and means for coupling a predetermined drive signal to the primary winding of the transformer only when the associated power transistor is switched off by the driver means, such that when the power transistor is again switched on and the drive signal therefore uncoupled from the primary winding, the magnetic field stored in the transformer collapses, to actuate the switch means, the transformer being sized such that the switch means is actuated for a duration corresponding to about one-half the natural period of the associated inductor and snubber capacitor, such that the switch means discharges the capacitor through the inductor.

Claim 5

A power bridge circuit as defined in claim 2, wherein: the circuit is a half bridge, with the side of the inductive load opposite the first and second transistors being held at a substantially constant voltage; and the first and second discharge means both connect their respective associated snubber capacitors to the side of the inductive load opposite the first and second transistors.

Claim 6

A power bridge circuit as defined in claim 2, wherein: the circuit is a full bridge and further includes third and fourth switching power transistors connected to the side of the inductive load opposite the first and second transistors, the third transistor being arranged to cooperate with the first transistor in coupling electrical current through the load in the first direction, and the fourth transistor being arranged to cooperate with the second transistor in coupling electrical current through the load in the second direction; the driver means controllably switches on and off the first and third transistors at substantially the same times and the second and fourth transistors at substantially the same times; the circuit further includes third and fourth snubber capacitors shunting the respective third and fourth transistors, such that when each transistor is switched off by the driver means, electrical current flowing through the inductive load is diverted through the associated capacitor, to charge the capacitor to a predetermined voltage; the first discharge means interconnects the first and third capacitors, to simultaneously discharge both of them to their original states when the first and third transistors are again switched on by the driver means; and the second discharge means interconnects the second and fourth capacitors, to simultaneously discharge both of them to their original states when the second and fourth transistors are again switched on by the driver means.

Claim 7

A power bridge circuit as defined in claim 4 wherein: the first and third snubber capacitors have substantially equal capacitance values; and the second and fourth snubber capacitors have substantially equal capacitance values.

Claim 8

A power bridge circuit for driving an inductive load, comprising: first, second, third and fourth switching power transistors connected to an inductive load, the first and third transistors being connected to opposite sides of the load and arranged to couple an electrical current through the load in a first direction, and the second and fourth transistors likewise being connected to opposite sides of the load and arranged to couple an electrical current through the load in a second, opposite direction; driver means for controllably biasing on the first and third transistors at substantially the same times and the second and fourth transistors at substantially the same times not coincident with the times the first and third transistors are biased on; first, second, third and fourth capacitors shunting the respective first, second, third and fourth transistors, such that when the driver means biases off each corresponding pair of transistors, electrical current flowing through the inductive load is diverted through the associated pair of capacitors, to charge the capacitors to predetermined voltages; and first non-dissipative discharge means interconnecting the first and third capacitors, and second non-dissipative discharge means interconnecting the second and fourth capacitors, each of the first and second discharge means discharging its two associated capacitors simultaneously to their original states when the driver means again biases on the associated transistors, each of the first and second discharge means including an inductor, switch means connected in series with the inductor, and actuation means for controllably actuating the switch means when the associated transistors are biased on, to simultaneously discharge the two associated capacitors through the inductor.

Claim 9

A power bridge circuit for driving an inductive load, comprising: first, second, third and fourth switching power transistors connected to an inductive load, the first and third transistors being connected to opposite sides of the load and arranged to couple an electrical current through the load in a first direction, and the second and fourth transistors likewise being connected to opposite sides of the load and arranged to couple an electrical current through the load in a second, opposite direction; driver means for controllably biasing on the first and third transistors at substantially the same times and the second and fourth transistors at substantially the same times not coincident with the times the first and third transistors are biased on; first, second, third and fourth capacitors shunting the respective first, second, third and fourth transistors, such that when the driver means biases off each corresponding pair of transistors, electrical current flowing through the inductive load is diverted through the associated pair of capacitors, to charge the capacitors to predetermined voltages; and first non-dissipative discharge means interconnecting the first and third capacitors, and second non-dissipative discharge means interconnecting the second and fourth capacitors, each of the first and second discharge means discharging its two associated capacitors simultaneously to their original states when the driver means again biases on the associated transistors, each of the first and second discharge means including an inductor, switch means connected in series with the inductor, and actuation means for controllably actuating the switch means when the associated transistors are biased on, to simultaneously discharge the two associated capacitors through the inductor.

Claim 10

A power bridge circuit as defined in claim 6, wherein: the first and third capacitors have substantially equal capacitance values; and the second and fourth capacitors have substantially equal capacitance values.

Claim 11

A power bridge circuit as defined in claim 6, wherein each discharge means further includes a series-connected resistor and capacitor shunting the inductor, for reducing the amplitude of any oscillating voltage across the inductor immediately after the actuation means stops actuating the switch means.

Claim 12

A power bridge circuit as defined in claim 6, wherein the actuation means included in each of the first and second discharge means includes: a transformer having a primary winding and a secondary winding, the secondary winding being connected to the switch means; and means for coupling a predetermined drive signal to the primary winding of the transformer only when the associated power transistor is switched off by the driver means, such that when the power transistor is again switched on and the drive signal therefore uncoupled from the primary winding, the magnetic field stored in the transformer collapses, to actuate the switch means for a predetermined time duration.

Claim 13

A power bridge circuit as defined in claim 6, wherein the actuation means included in each of the first and second discharge means controllably actuates the associated switch means for a duration corresponding to about one-half the natural period of the associated inductor and capacitor.

Claim 14

An improvement as defined in claim 1, wherein: the first and third capacitors have substantially equal capacitance values; and the second and fourth capacitors have substantially equal capacitance values.

Claim 15

An improvement as defined in claim 1, wherein each discharge means further includes a seriesconnected resistor and capacitor shunting the inductor, for reducing the amplitude of any oscillating voltage across the inductor immediately after the actuation means stops actuating the switch means.

Claim 16

An improvement as defined in claim 1, wherein the actuation means included in each of the first and second discharge means includes: a transformer having a primary winding and a secondary winding, the secondary winding being connected to the switch means; and means for coupling a predetermined drive signal to the primary winding of the transformer only when the associated power transistor is switched off by the driver means, such that when the power transistor is again switched on and the drive signal therefore uncoupled from the primary winding, the magnetic field stored in the transformer collapses, to actuate the switch means for a predetermined time duration.

Claim 17

An improvement as defined in claim 1, wherein the actuation means included in each of the first and second discharge means controllably actuates the associated switch means for a duration corresponding to about one-half the natural period of the associated inductor and capacitor.