US4336587A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High efficiency turn-off loss reduction network with active discharge of storage capacitor
Assignee: AT&T Inc
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Filing: 1981-06-29
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Granted: 1982-06-22
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Expires: 2001-06-29
Abstract
Abstract A turn-off loss reduction network is applied to the power transistors of a double-ended inverter circuit to reduce power dissipation therein. A switched resonance discharge circuit is utilized to discharge the storage capacitor of the turn-off loss reduction network. Dissipation during discharge is eliminated by including an energy recovery circuit in the discharge network which is operative to return the energy to the input voltage source of the inverter. The gate discharge circuit includes a gated resonant discharge path with an inductive storage medium having a secondary winding or otherwise coupled to return the energy to the input voltage source. At the beginning of the conduction cycle of the power switching transistor, a gate is enabled which allows the capacitor to discharge into the inductive storage medium. When the discharge current reaches its peak value, the gate is disabled, and the energy stored in the inductive medium is discharged to the source by flyback action.
Inventors
- 👤 Charles W. Boettcher, Jr.
- 👤 Robert E. Schroeder
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 23:12
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/337; H02M3/3372; Y; Y02; Y02B; Y02B70/00; Y02B70/10
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
189 words
In combination; an inverter circuit including first and second high efficiency turn-off loss reduction networks each coupled to reduce turn-off loss in first and second power switching transistors coupling a DC voltage source to a power transformer, each of the first and second turn-off loss reduction networks comprising; a charge storage capacitor coupled to a main conduction path electrode of a power switching transistor of the inverter, a charging path coupled for providing an alternate path for current flow from the power transformer when the power transistor is being biased from conduction to nonconduction, and a resonant discharge path coupled to transfer energy stored in the charge storage capacitor into the DC voltage source when the power transistor is biased conducting, including a gating transistor switch biased into conduction when the power transistor is biased conducting and coupled to deliver energy to an inductive storage medium, timing circuitry to bias the gating transistor switch nonconducting at a predetermined time interval, and a flyback discharge path coupling the inductive storage medium to the DC voltage source in order to discharge energy thereto when the gating transistor switch is biased nonconducting.
Claim 2
Dependent Claim
189 words
In combination; an inverter circuit including first and second high efficiency turn-off loss reduction networks each coupled to reduce turn-off loss in first and second power switching transistors coupling a DC voltage source to a power transformer, each of the first and second turn-off loss reduction networks comprising; a charge storage capacitor coupled to a main conduction path electrode of a power switching transistor of the inverter, a charging path coupled for providing an alternate path for current flow from the power transformer when the power transistor is being biased from conduction to nonconduction, and a resonant discharge path coupled to transfer energy stored in the charge storage capacitor into the DC voltage source when the power transistor is biased conducting, including a gating transistor switch biased into conduction when the power transistor is biased conducting and coupled to deliver energy to an inductive storage medium, timing circuitry to bias the gating transistor switch nonconducting at a predetermined time interval, and a flyback discharge path coupling the inductive storage medium to the DC voltage source in order to discharge energy thereto when the gating transistor switch is biased nonconducting.
Claim 3
Dependent Claim
59 words
An inverter circuit as defined in claim 1 wherein the timing circuitry is synchronized with drive circuitry for the power transistor and has a timing period to drive the gating transistor switch conducting for a minimum interval equal to one quarter of a resonant period defined by reactive values of the charge storage capacitor and the inductive storage medium.
Claim 4
Dependent Claim
100 words
An inverter circuit as defined in claim 2 wherein the charging path includes a diode connected in series circuit with the charge storage capacitor and the series circuit shunted across a main conduction path of the power switching transistor, the resonant discharge path coupled to a common junction of the diode and charge storage capacitor and the inductive storage medium comprising a transformer having a primary winding coupled to the gating transistor switch and the flyback discharge path including a secondary winding of the transformer and a second diode connected in series connection and coupled to the DC voltage source.
Claim 5
Dependent Claim
59 words
An inverter circuit as defined in claim 1 wherein the timing circuitry is synchronized with drive circuitry for the power transistor and has a timing period to drive the gating transistor switch conducting for a minimum interval equal to one half of a resonant period defined by reactive values of the charge storage capacitor and the inductive storage medium.
Claim 6
Dependent Claim
79 words
An inverter circuit as defined in claim 4 wherein the charging path includes a diode connected in series circuit with the charge storage capacitor and the series circuit being shunted across a primary winding of the power transformer, the resonant discharge path coupled to a common junction of the diode and the charge storage capacitor and the inductive storage medium, a coil intercoupling the gating transistor switch to an input terminal to which the DC voltage source is connected.
Claim 7
Dependent Claim
145 words
An inverter circuit comprising; input means to accept a voltage source, output means, at least a switching transistor coupling the input means to the output means, a turn-off loss reduction network comprising; a charge storage capacitor in a series circuit shunting the switching transistor, a discharge network to discharge the capacitor when the switching transistor is biased from nonconduction into conduction comprising; an energy storage inductor including an input winding and an output winding, a gating transistor coupling the capacitor to the input winding, drive means synchronized to bias the gating transistor into conduction when the switching transistor is biased into conduction, for an interval sufficient to discharge the capacitor into the inductor, and a discharge diode coupling the output winding to the input means and oriented to discharge energy stored in the inductor into the voltage source when the gating transistor is biased nonconducting.
Claim 8
Dependent Claim
145 words
An inverter circuit comprising; input means to accept a voltage source, output means, at least a switching transistor coupling the input means to the output means, a turn-off loss reduction network comprising; a charge storage capacitor in a series circuit shunting the switching transistor, a discharge network to discharge the capacitor when the switching transistor is biased from nonconduction into conduction comprising; an energy storage inductor including an input winding and an output winding, a gating transistor coupling the capacitor to the input winding, drive means synchronized to bias the gating transistor into conduction when the switching transistor is biased into conduction, for an interval sufficient to discharge the capacitor into the inductor, and a discharge diode coupling the output winding to the input means and oriented to discharge energy stored in the inductor into the voltage source when the gating transistor is biased nonconducting.
Claim 9
Dependent Claim
57 words
An inverter circuit as defined in claim 6 wherein said drive means comprises; a monostable circuit having a timed state equal to a one quarter resonant sinusoidal period defined by the reactive values of the charge storage capacitor and the energy storage inductor, whereby the one quarter resonant sinusoidal period is sufficient to completely discharge the capacitor.
Claim 10
Dependent Claim
27 words
An inverter circuit as defined in claim 6 wherein a magnetizing path diode is shunted across a series connection including the gating transistor and the input winding.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-06-21 | 1985-12-21 | 1986-06-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-06-21 | 1989-12-21 | 1990-06-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-06-21 | 1993-12-21 | 1994-06-22 | $7700.00 | Window Closed / Lapsed |