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US4626879A Expired / Lapsed US ⏱️ 0.0 years remaining

Lateral double-diffused MOS transistor devices suitable for source-follower applications

Assignee: Philips North America LLC
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Filing: 1985-08-15
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Granted: 1986-12-02
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Expires: 2005-08-15
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Abstract

Abstract A lateral double-diffused MOS transistor includes an intermediate semiconductor layer of the same conductivity type as the channel region which extends laterally from the channel region to beneath the drain contact region of the device. This intermediate semiconductor layer substantially improves the punchthrough and avalanche breakdown characteristics of the device, thus permitting operation in the source-follower mode, while also providing a compact structure which features a relatively low normalized "on" resistance.

Inventors

  • 👤 Sel Colak

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 19:06
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/65; H10D12/00; H10D12/411; H10D12/441; H10D12/491; H10D62/00; H10D62/10; H10D62/102; H10D62/103; H10D62/105; H10D62/106; H10D62/109; H10D62/111; H10D62/17; H10D62/393; Y; Y10; Y10S; Y10S257/00; Y10S257/901

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 262 words
A lateral double-diffused MOS transistor, which comprises: a semiconductor substrate of a first conductivity type; a first semiconductor layer of a second conductivity type opposite to that of the first on a first major surface of said substrate; a second semiconductor layer of said first conductvity type on said first layer; a third semiconductor surface layer of said second conductivity type on said second layer, the product of the net doping concentration and the thickness of said first, second and third semiconductor layers each being selected to accordance with the RESURF principle such that the product of doping concentration and layer thickness is typically approximately 10 12 atoms/cm 2 ; a first surface-adjoining channel region of said first conductivity type in said third layer and connected to said second semiconductor layer; a surface-adjoining source region of said second conductivity type in said channel region; a first surface-adjoining drain contact region of said second conductivity type in said third layer and spaced apart from said first channel region; an extended drain region formed from a portion of said third layer between said first drain contact region and said first channel region; an insulating layer on the surface of said transistor and covering at least that portion of the first surface-adjoining channel region located between said source and said extended drain regions; a first gate electrode on said insulating layer, over said portion of the first channel region and electrically isolated from said third layer; and source and first drain electrodes connected respectively to the source and first drain contact regions of the transistor.
Claim 2
Dependent Claim 262 words
A lateral double-diffused MOS transistor, which comprises: a semiconductor substrate of a first conductivity type; a first semiconductor layer of a second conductivity type opposite to that of the first on a first major surface of said substrate; a second semiconductor layer of said first conductvity type on said first layer; a third semiconductor surface layer of said second conductivity type on said second layer, the product of the net doping concentration and the thickness of said first, second and third semiconductor layers each being selected to accordance with the RESURF principle such that the product of doping concentration and layer thickness is typically approximately 10 12 atoms/cm 2 ; a first surface-adjoining channel region of said first conductivity type in said third layer and connected to said second semiconductor layer; a surface-adjoining source region of said second conductivity type in said channel region; a first surface-adjoining drain contact region of said second conductivity type in said third layer and spaced apart from said first channel region; an extended drain region formed from a portion of said third layer between said first drain contact region and said first channel region; an insulating layer on the surface of said transistor and covering at least that portion of the first surface-adjoining channel region located between said source and said extended drain regions; a first gate electrode on said insulating layer, over said portion of the first channel region and electrically isolated from said third layer; and source and first drain electrodes connected respectively to the source and first drain contact regions of the transistor.
Claim 3
Dependent Claim 64 words
A lateral double-diffused MOS transistor as in claim 1, wherein the doping level of said second layer is higher than that of said substrate, the doping level of said first channel region is higher than that of said second layer, and the doping level of said source and first drain contact regions is higher than the doping level of said first and third layers.
Claim 4
Dependent Claim 41 words
A lateral double-diffused MOS transistor as in claim 2, wherein said source electrode electrically connects said source and first channel regions together, and further comprising a substrate electrode on a second major surface of said substrate opposite said first major surface.
Claim 5
Dependent Claim 61 words
A lateral double-diffused MOS transistor as in claim 1, further comprising a plurality of spaced-apart semiconductor zones of said second conductivity type located in that portion of said second semiconductor layer extending laterally from adjacent said first channel region to beneath said first drain contact region, said semiconductor zones extending vertically from said first semiconductor layer to said third semiconductor layer.
Claim 6
Dependent Claim 32 words
A lateral double-diffused MOS transistor as claimed in claim 4, wherein said spaced-apart zones comprise strip-shaped zones extending continuously from adjacent said first channel region to beneath said first drain contact region.
Claim 7
Dependent Claim 44 words
A lateral double-diffused MOS transistor as claimed in claim 4, wherein each of said spaced-apart zones comprises a first subzone located adjacent said first channel region and a second subzone, spaced apart from said first subzone and located beneath said first drain contact region.
Claim 8
Dependent Claim 29 words
A lateral double-diffused MOS transistor as claimed in claim 4, wherein said spaced-apart semiconductor zones comprise n-type zones having a doping level of about 10 16 donors/cm 3 .
Claim 9
Dependent Claim 138 words
A lateral double-diffused MOS transistor as in claim 1, further comprising a second surface-adjoining drain end region of said first conductivity type in said third layer, extending down to said first layer, and electrically isolated from said first drain contact region by a p-n junction, a second surface-adjoining channel region of said second conductivity type between said first drain contact region and said second drain end region, said insulating layer on the surface of said transistor further covering that portion of the second surface-adjoining channel region located between said drain regions, a further surface-adjoining source region of said first conductivity type in said second surface-adjoining channel region and connected to said first drain electrode, and a further gate electrode on said insulating layer, over said portion of the second channel region and electrically isolated from said third layer.
Claim 10
Dependent Claim 63 words
A lateral double-diffused MOS transistor as in claim 8, further comprising a plurality of spaced-apart semiconductor zones of said second conductivity type located in that portion of said second semiconductor layer extending laterally from adjacent said first channel region to at least beneath said first drain contact region, said semiconductor zones extending vertically from said first semiconductor layer to said third semiconductor layer.
Claim 11
Dependent Claim 34 words
A lateral double-diffused MOS transistor as claimed in claim 9, wherein said spaced-apart zones comprise strip-shaped zones extending continuously from adjacent said first channel region to at least beneath said first drain contact region.
Claim 12
Dependent Claim 44 words
A lateral double-diffused MOS transistor as claimed in claim 9, wherein each of said spaced-apart zones comprises a first subzone located adjacent said first channel region and a second subzone, spaced apart from said first subzone and located beneath said first drain contact region.
Claim 13
Dependent Claim 63 words
A lateral double-diffused MOS transistor as in claim 1, wherein said first and third semiconductor layers comprise n-type layers having a doping level of about 10 16 donors/cm 3 . and a thickness of about 2 microns, and said second semiconductor layer comprises a p-type layer having a doping level of about 10 16 acceptors/cm 3 and a thickness of about 2 microns.

References Cited (Backward Citations)

US4292642A Cited
US4300150A Cited
US4422089A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-12-01 1990-06-02 1990-12-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-12-01 1994-06-02 1994-12-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-12-01 1998-06-02 1998-12-02 $7700.00 Window Closed / Lapsed

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