US4618815A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Mixed threshold current mirror
Assignee: Nokia Bell Labs
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Filing: 1985-02-11
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Granted: 1986-10-21
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Expires: 2005-02-11
Abstract
Abstract An MOS current mirror arrangement is disclosed wherein selected ones of the input and output transistors are designed to have a threshold voltage, V T1 , greater in magnitude that associated with standard MOS devices. The larger threshold voltage thus eases the requirement that the turn-on voltage, V ON , remain less than the threshold voltage V T , for the devices to remain in the active region of operation. Since a minimum value of V T is useful for some applications (fast processing and operation at high temperatures) the use of mixed thresholds allows both requirements to be met by adjusting the thresholds of selected devices associated with these different requirements. The difference in threshold voltages can be attained simply by adjusting the threshold adjust implant mask to protect selected devices from the ion implantation conventionally used to decrease the magnitude of the threshold voltage.
Inventors
- 👤 Eric J. Swanson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 03:53
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/262
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
230 words
An MOS current amplifying apparatus comprising at least two input MOS transistors, each having a conduction path and a gate electrode, the conduction paths being connected in parallel with each other; means for providing an input current to each transistor of said at least two input MOS transistors; at least two output MOS transistors associated in a one-to-one relationship with said at least two input MOS transistors, each output transistor having a conduction path and a gate electrode, the gate electrode of each of said at least two output transistors being coupled to a point in the input conduction path and also the gate electrode of said input transistor associated therewith, wherein at least one of said input transistors and at least one of said output transistors comprises a first threshold voltage (V T1 ) greater in magnitude than a second threshold voltage (V T2 ) associated with the remaining input and output transistors; and an equalizing MOS transistor including a drain, source and gate electrode, having its conduction path connected between one side of the conduction path of one of said at least two input transistors and the point at which the gate electrode of said one input transistor is connected to the input current path, said equalizing transistor providing currents of like magnitude to each input transistor and comprising a drain-to-source voltage equal to the first greater, threshold.
Claim 2
Dependent Claim
230 words
An MOS current amplifying apparatus comprising at least two input MOS transistors, each having a conduction path and a gate electrode, the conduction paths being connected in parallel with each other; means for providing an input current to each transistor of said at least two input MOS transistors; at least two output MOS transistors associated in a one-to-one relationship with said at least two input MOS transistors, each output transistor having a conduction path and a gate electrode, the gate electrode of each of said at least two output transistors being coupled to a point in the input conduction path and also the gate electrode of said input transistor associated therewith, wherein at least one of said input transistors and at least one of said output transistors comprises a first threshold voltage (V T1 ) greater in magnitude than a second threshold voltage (V T2 ) associated with the remaining input and output transistors; and an equalizing MOS transistor including a drain, source and gate electrode, having its conduction path connected between one side of the conduction path of one of said at least two input transistors and the point at which the gate electrode of said one input transistor is connected to the input current path, said equalizing transistor providing currents of like magnitude to each input transistor and comprising a drain-to-source voltage equal to the first greater, threshold.
Claim 3
Dependent Claim
206 words
An MOS current amplifying apparatus as defined in claim 1 wherein the at least two input MOS transistors comprise a pair of MOS transistors, each transistor having a drain electrode, a source electrode, and a gate electrode, the drain and gate electrodes of a first MOS transistor of said pair of MOS transistors being connected together and coupled to a first current source of the current supplying means, the drain and gate electrodes of the remaining MOS transistor being connected together and coupled to a second current source of said current supplying means; the at least two output MOS transistors comprise a pair of MOS transistors, each transistor having a drain electrode, a source electrode, and a gate electrode, said pair of output MOS transistors connected in series with each other, the gate electrode of a first output transistor of said pair of output transistors connected to the gate electrode of the first input transistor and the gate electrode of a second output transistor connected to the gate electrode of the second, remaining input transistor, the first input and first output transistor comprising the first threshold voltage, V T1 , and the second input and second output transistors comprising the second threshold voltage, V T2 .
Claim 4
Dependent Claim
27 words
An MOS current amplifying apparatus as defined in claim 1 wherein the at least two input transistors and at least two output transistors are n-channel MOS devices.
Claim 5
Dependent Claim
57 words
An MOS current amplifying apparatus as defined in claim 3 wherein the first threshold voltage associated with at least one of the input and at least one of the output transistors is approximately equal to +1.5 V and the second threshold voltage associated with the remaining input and remaining output transistors is approximately equal to +0.7 V.
Claim 6
Dependent Claim
27 words
An MOS current amplifying apparatus as defined in claim 1 wherein the at least two input transistors and at least two output transistors are p-channel MOS devices.
Claim 7
Dependent Claim
57 words
An MOS current amplifying apparatus as defined in claims 5 wherein the first threshold voltage associated with at least one of the input and at least one of the output transistors is approximately equal to -1.5 V and the second threshold voltage associated with the remaining input and remaining output transistors is approximately equal to -0.8 V.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-10-20 | 1990-04-21 | 1990-10-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-10-20 | 1994-04-21 | 1994-10-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-10-20 | 1998-04-21 | 1998-10-21 | $7700.00 | Window Closed / Lapsed |