Configuration of a metal insulator semiconductor with a processor based gate

Claim 1

A method for fabricating a photodetector, comprising: fabricating a substrate having an array of switching elements formed therein, the outputs of each of said array elements selectable for connection to a first external terminal; forming a plurality of vias on said substrate, each via extending to one of said outputs, forming a plurality of deformable conductive gates, each of said gates disposed in and substantially filling its associated via and being in conductive contact with the input of one of said array elements, the upper surface of each of said deformable gates being higher than the highest point on the surface of said substrate by a predetermined distance; disposing a layer of dielectric insulating material on one surface of a layer of photosensitive semiconductor material to form a superstrate; disposing said superstrate adjacent said substrate with said dielectric layer in proximity to said deformable gates; applying pressure to said substrate and said superstrate directed toward the interface therebetween to conform said deformable gates with the surface of said dielectric layer and force excess deformable gate material over a large portion of the surface of said substrate surrounding said via without contacting a gate of an adjacent via; and connecting the surface of said photosensitive layer opposite said dielectric layer to a second external terminal.

Claim 2

A method for fabricating a photodetector, comprising: fabricating a substrate having an array of switching elements formed therein, the outputs of each of said array elements selectable for connection to a first external terminal; forming a plurality of vias on said substrate, each via extending to one of said outputs, forming a plurality of deformable conductive gates, each of said gates disposed in and substantially filling its associated via and being in conductive contact with the input of one of said array elements, the upper surface of each of said deformable gates being higher than the highest point on the surface of said substrate by a predetermined distance; disposing a layer of dielectric insulating material on one surface of a layer of photosensitive semiconductor material to form a superstrate; disposing said superstrate adjacent said substrate with said dielectric layer in proximity to said deformable gates; applying pressure to said substrate and said superstrate directed toward the interface therebetween to conform said deformable gates with the surface of said dielectric layer and force excess deformable gate material over a large portion of the surface of said substrate surrounding said via without contacting a gate of an adjacent via; and connecting the surface of said photosensitive layer opposite said dielectric layer to a second external terminal.

Claim 6

A method for fabricating a metal insulator semiconductor, comprising: fabricating a substrate having an array of switching elements formed therein, each of the array elements having an associated output selectable for connection with a first external terminal; forming a plurality of vias on said substrate, each via extending to one of said outputs; forming a plurality of deformable conductive gates disposed in and substantially filling its associated via and disposed on the surface of the substrate, each of the gates conductively associated with an associated input of one of the array elements, each of the gates having a planar surface higher than the highest point in the topography of the substrate by a predetermined amount; disposing a layer of nonconductive dielectric material on one surface of a layer of photosensitive semiconductor material to form a superstrate; disposing the superstrate adjacent the substrate with the dielectric layer contacting the uppermost surface of the deformable gates; applying combined pressure and heat to deform the gates for conformation with the surface of the dielectric and force excess deformable gate material over the surface of said substrate surrounding said via; polishing the exposed upper surface of the superstrate to reduce the thickness thereof to reduce the path length of photo-generated carriers passing from one surface of the photosensitive semiconductor layer to the diametrically opposite surface thereof; and connecting the upper surface of the supperstrate to a second external terminal.

Claim 7

A method for fabricating a metal insulator semiconductor, comprising: fabricating a substrate having an array of switching elements formed therein, each of the array elements having an associated output selectable for connection with a first external terminal; forming a plurality of vias on said substrate, each via extending to one of said outputs; forming a plurality of deformable conductive gates disposed in and substantially filling its associated via and disposed on the surface of the substrate, each of the gates conductively associated with an associated input of one of the array elements, each of the gates having a planar surface higher than the highest point in the topography of the substrate by a predetermined amount; disposing a layer of nonconductive dielectric material on one surface of a layer of photosensitive semiconductor material to form a superstrate; disposing the superstrate adjacent the substrate with the dielectric layer contacting the uppermost surface of the deformable gates; applying combined pressure and heat to deform the gates for conformation with the surface of the dielectric and force excess deformable gate material over the surface of said substrate surrounding said via; polishing the exposed upper surface of the superstrate to reduce the thickness thereof to reduce the path length of photo-generated carriers passing from one surface of the photosensitive semiconductor layer to the diametrically opposite surface thereof; and connecting the upper surface of the supperstrate to a second external terminal.