Patent US4609414A successfully refreshed from Google Patents.
US4609414A
Expired / Lapsed
US
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Emitter finger structure in a switching transistor
Assignee: Thales SA
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Filing: 1983-06-06
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Granted: 1986-09-02
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Expires: 2003-06-06
Abstract
Abstract A particular emitter finger structure in an NPN type switching transistor. The emitter zone is divided into two lateral N type strips. In the central part are provided, on the one hand, a diffusion of N type dopants whose junction depth is small and, on the other hand, a gold diffusion substantially of the same depth as that of the junction depth of said lateral zones. Thus, any possibility of injection at the center of the emitter finger is removed, which allows higher speed transistors to be obtained.
Inventors
- 👤 Philippe Bouard
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 12:51
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/133; H10D62/136; H10D62/80; H10D62/83; H10D62/834
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
186 words
A method for manufacturing a NPN bipolar transistor with interdigitated emitter and base fingers, each emitter finger comprising a central portion and two lateral portions, said central portion and lateral portions being contacted by a common emitter metallisation, said method comprising the following steps: formation of said lateral portions by local phosphorous diffusion with a surface concentration greater than 10 20 atoms/cm 3 , said phosphorus diffusion extending at a first depth; formation of silicon oxide masking the emitter and base fingers except in said central portion; depositon of an arsenic doped gold layer on said silicon oxide and said central portion; formation of a gold/silicon eutectic in said central portion; selective removal of said gold layer where an eutectic has not been formed; simultaneous diffusion of gold and arsenic in said central portion, said gold diffusing down to a depth approximately equal to said first depth and said arsenic diffusing down to a second depth much smaller than said first depth; removal of said silicon oxide above said lateral portions at least in regions adjacent to said central portion; and deposition of an emitter metallisation.
Claim 2
Independent Claim
186 words
A method for manufacturing a NPN bipolar transistor with interdigitated emitter and base fingers, each emitter finger comprising a central portion and two lateral portions, said central portion and lateral portions being contacted by a common emitter metallisation, said method comprising the following steps: formation of said lateral portions by local phosphorous diffusion with a surface concentration greater than 10 20 atoms/cm 3 , said phosphorus diffusion extending at a first depth; formation of silicon oxide masking the emitter and base fingers except in said central portion; depositon of an arsenic doped gold layer on said silicon oxide and said central portion; formation of a gold/silicon eutectic in said central portion; selective removal of said gold layer where an eutectic has not been formed; simultaneous diffusion of gold and arsenic in said central portion, said gold diffusing down to a depth approximately equal to said first depth and said arsenic diffusing down to a second depth much smaller than said first depth; removal of said silicon oxide above said lateral portions at least in regions adjacent to said central portion; and deposition of an emitter metallisation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-09-01 | 1990-03-03 | 1990-09-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-09-01 | 1994-03-03 | 1994-09-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-09-01 | 1998-03-03 | 1998-09-02 | $7700.00 | Window Closed / Lapsed |