Patent US4608530A successfully refreshed from Google Patents.
US4608530A
Expired / Lapsed
US
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Programmable current mirror
Assignee: Intersil Corp
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Filing: 1984-11-09
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Granted: 1986-08-26
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Expires: 2004-11-09
Abstract
Abstract Compensation for a reference current is provided using a current mirror which has programmable controlled legs which vary the ratio of the input reference current and the output reference current. The input reference current is measured without activating the current mirror and the controlled legs are programmed to provide the desired ratio. The parallel connected programmable controlled legs have a binary weighted current capacity.
Inventors
- 👤 Kanti Bacrania
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:43
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/262
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
186 words
A programmable current mirror circuit comprising: a controlling transistor having first and second terminals defining a current path and a control terminal, said first terminal being connected to a circuit input terminal, said second terminal being connected to a reference terminal and said control terminal being connected to said first terminal; a primary controlled transistor having first and second terminals defining a current path and a control terminal, said first terminal being connected to a circuit output terminal, said second terminal being connected non-programmably to said reference terminal and said control terminal of said primary controlled transistor being connected to said control terminal of said controlling transistor; and a plurality of secondary controlled transistors each having first and second terminals defining a current path and a control terminal, said first terminal being connected to said circuit output terminal, said control terminal of said secondary controlled transistor being connected to said control terminal of said primary controlled transistor and programmable means for selectively connecting said second terminal to said reference terminal to determine the match of current at said circuit input terminal and said circuit output terminal.
Claim 2
Dependent Claim
186 words
A programmable current mirror circuit comprising: a controlling transistor having first and second terminals defining a current path and a control terminal, said first terminal being connected to a circuit input terminal, said second terminal being connected to a reference terminal and said control terminal being connected to said first terminal; a primary controlled transistor having first and second terminals defining a current path and a control terminal, said first terminal being connected to a circuit output terminal, said second terminal being connected non-programmably to said reference terminal and said control terminal of said primary controlled transistor being connected to said control terminal of said controlling transistor; and a plurality of secondary controlled transistors each having first and second terminals defining a current path and a control terminal, said first terminal being connected to said circuit output terminal, said control terminal of said secondary controlled transistor being connected to said control terminal of said primary controlled transistor and programmable means for selectively connecting said second terminal to said reference terminal to determine the match of current at said circuit input terminal and said circuit output terminal.
Claim 3
Dependent Claim
42 words
A programmable current mirror circuit according to claim 1, wherein said controlling transistor and said primary controlled transistor have equal current capacity and said secondary controlled transistors each have a current capacity smaller than said current capacity of said primary controlled transistor.
Claim 4
Dependent Claim
19 words
A programmable current mirror circuit according to claim 2, wherein said secondary controlled transistors have binary weighted current capacities.
Claim 5
Dependent Claim
43 words
A programmable current mirror circuit according to claim 1, including for each programming means a programming terminal for programming said programming means in combination with said reference terminal and connected between said second terminal of said secondary controlled transistor and said programming means.
Claim 6
Dependent Claim
56 words
A programmable current mirror circuit according to claim 1, including a sensing terminal connected to said input terminal for sensing current at said input terminal and a diode connected between said sensing terminal and said first terminal of said controlling transistor for disabling said current mirror circuit when current is being sensed at said sensing terminal.
Claim 7
Dependent Claim
29 words
A programmable current mirror circuit according to claim 1, wherein said transistors are bipolar transistors with a collector-emitter forming said current path and a base being said control terminal.
Claim 8
Dependent Claim
28 words
A programmable current mirror circuit according to claim 1, wherein said transistors are field effect transistors with a source-drain current path and a gate being said control terminal.
Claim 9
Independent Claim
104 words
A method of adjusting a reference current circuit comprising: providing a current mirror in said reference current circuit having a controlling leg connected to an input reference current terminal and a controlled leg and a plurality of programmable controlled legs connected in parallel to an output reference current terminal; measuring the input reference current at said input current reference terminal; and adjusting the current capacity of said controlled leg with respect to said controlling leg by programmably connecting selected programmable controlled legs to produce a desired output reference current at said output reference current terminal as a function of said measured input reference current.
Claim 10
Independent Claim
104 words
A method of adjusting a reference current circuit comprising: providing a current mirror in said reference current circuit having a controlling leg connected to an input reference current terminal and a controlled leg and a plurality of programmable controlled legs connected in parallel to an output reference current terminal; measuring the input reference current at said input current reference terminal; and adjusting the current capacity of said controlled leg with respect to said controlling leg by programmably connecting selected programmable controlled legs to produce a desired output reference current at said output reference current terminal as a function of said measured input reference current.
Claim 11
Dependent Claim
29 words
A method of adjusting a reference current circuit according to claim 8 including providing means to prevent activation of said current mirror during said measuring and said adjusting steps.
Claim 12
Dependent Claim
26 words
A method of adjusting a reference current circuit according to claim 8 wherein said programmable controlled legs are provided to have a binary weighted current capacity.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-08-25 | 1990-02-24 | 1990-08-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-08-25 | 1994-02-24 | 1994-08-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-08-25 | 1998-02-24 | 1998-08-26 | $7700.00 | Window Closed / Lapsed |