High voltage guard ring with variable width shallow portion

Claim 2

A semiconductor device comprising a semiconductor body having a portion of one conductivity type adjoining a major surface of the body, an active device region of the opposite conductivity type also adjoining said major surface and forming with said portion a main p-n junction which extends to said major surface and which is operated under reverse bias in at least one mode of operation of the device, and at least one annular region of said opposite conductivity type extending around said active device region, which at least one annular region adjoins said major surface and forms with said portion an auxiliary p-n junction located within the spread of a depletion layer from the reverse-biased main p-n junction so as to increase the breakdown voltage of the main p-n junction, said active device region and said annular region being more highly doped than said portion of the body, characterized in that, of the group formed by the active device region and the annular regions, at least a first region comprises both a deep portion and a shallower portion which extends laterally outwards from the deep portion toward a surrounding annular region of the group, said first region having an outer perimeter in the form of straight sides joined by rounded corners, and the shallower portion being located at the rounded corners but not along the whole length of the straight sides.

Claim 3

A semiconductor device as claimed in claim 1, further characterized in that said first region comprises a shallower portion in the active device region.

Claim 4

A semiconductor device as claimed in claim 2, further characterized in that at least on its said outer sides the surrounding annular region also comprises a shallower portion.

Claim 5

A semiconductor device as claimed in claim 1 or claim 2, further characterized in that there extends around the active device region a plurality of said annular regions of which at least one inner annular region comprises said shallow portion on at least one side whereas at least one outer annular region consists solely of a deep region having substantially the same doping concentration and depth as the deep portion of said at least one inner annular region.

Claim 6

A semiconductor device as claimed in claim 4, further characterized in that said at least one inner annular region which comprises both shallow and deep portions is wider than said at least one outer annular region which consists solely of the deep region.

Claim 7

A semiconductor device as claimed in claim 4, further characterized in that the spacing between the annular regions which are remote from the active device region is larger than the spacing of the inner annular regions.

Claim 8

A semiconductor device as claimed in claim 1 or claim 2, further characterized in that the shallower portion of at least one said first region is of smaller depth remote from the deep portion than adjacent the deep portion.

Claim 9

A semiconductor device as claimed in claim 1 or claim 2, further characterized in that a polycrystalline silicon layer having a higher resistivity than the underlying body portion of one conductivity type is present on the major surface of the semiconductor body, and at least an upper part of at least one said shallower portion and an upper part of the region from which said shallower portion laterally extends are doped areas of said opposite conductivity type in the high resistivity polycrystalline silicon layer.

Claim 10

A semiconductor device as claimed in claim 8, further characterized in that the high resistivity polycrystalline silicon layer contains an oxygen concentration so as to be semi-insulating outside each doped area of said opposite conductivity type.

Claim 11

A semiconductor device comprising a semiconductor body having a portion of one conductivity type adjoining a major surface of the body, an active device region of the opposite conductivity type also adjoining said major surface and forming with said portion a main p-n junction which extends to said major surface and is operated under reverse bias in at least one mode of operation of the device, and at least one annular region of said opposite conductivity type extending around said active device region, which at least one annular region adjoins said major surface and forms with said portion an auxiliary p-n junction located within the spread of a depletion layer from the reverse-biased main p-n junction so as to increase the breakdown voltage of the main p-n junction, said active device region and said annular region being more highly doped than said portion of the body, characterized in that, the active device region and the annular region each comprise both a deep portion and a shallower portion which extends laterally outwards from the deep portion, and at least on its side which faces toward the active device region the surrounding annular region comprises a shallower portion which extends laterally inwards from the deep portion of the annular region and which is of substantially the same doping concentration and depth as said shallower portion of the active device region so that the minimum spacing between the active device region and the surrounding annular region is determined by the spacing between the shallower portions, said annular region and said active device region each having in plan view an outer perimeter in the form of straight sides adjoined by rounded corners, said outwardly extending shallower portions of each being located at the rounded corners but not along the whole length of the straight sides.

Claim 12

A semiconductor device comprising a semiconductor body having a portion of one conductivity type adjoining a major surface of the body, an active device region of the opposite conductivity type also adjoining said major surface and forming with said portion a main p-n junction which extends to said major surface and is operated under reverse bias in at least one mode of operation of the device, and at least one annular region of said opposite conductivity type extending around said active device region, which at least one annular region adjoins said major surface and forms with said portion an auxiliary p-n junction located within the spread of a depletion layer from the reverse-biased main p-n junction so as to increase the breakdown voltage of the main p-n junction, said active device region and said annular region being more highly doped than said portion of the body, characterized in that, the active device region and the annular region each comprise both a deep portion and a shallower portion which extends laterally outwards from the deep portion, and at least on its side which faces toward the active device region the surrounding annular region comprises a shallower portion which extends laterally inwards from the deep portion of the annular region and which is of substantially the same doping concentration and depth as said shallower portion of the active device region so that the minimum spacing between the active device region and the surrounding annular region is determined by the spacing between the shallower portions, said annular region and said active device region each having in plan view an outer perimeter in the form of straight sides adjoined by rounded corners, said outwardly extending shallower portions of each being located at the rounded corners but not along the whole length of the straight sides.

Claim 13

A semiconductor device comprising a semiconductor body having a portion of one conductivity type adjoining a major surface of the body, an active device region of the opposite conductivity type also adjoining said major surface and forming with said portion a main p-n junction which extends to said major surface and which is operated under reverse bias in at least one mode of operation of the device, an inner annular region of said opposite conductivity type extending around said active device region, and an outer annular region of said opposite conductivity type extending around the inner annular region, which annular regions adjoin said major surface and form with said portion of said one conductivity type auxiliary p-n junctions located within the spread of a depletion layer from the reverse-biased main p-n junction so as to increase the breakdown voltage of the main p-n junction, said active device region and said annular regions being more highly doped than said portion of said one conductivity type, and at least the inner annular region and the active device region each comprise both a deep portion and a shallower portion which extends laterally outwards from the deep portion, said inner annular region and said active device region each having in plan view an outer perimeter in the form of straight sides joined by rounded corners, said shallower portions of each being located at the rounded corners but not along the whole length of the straight sides.

Claim 14

A semiconductor device comprising a semiconductor body having a portion of one conductivity type adjoining a major surface of the body, an active device region of the opposite conductivity type also adjoining said major surface and forming with said portion a main p-n junction which extends to said major surface and which is operated under reverse bias in at least one mode of operation of the device, an inner annular region of said opposite conductivity type extending around said active device region, and an outer annular region of said opposite conductivity type extending around the inner annular region, which annular regions adjoin said major surface and form with said portion of said one conductivity type auxiliary p-n junctions located within the spread of a depletion layer from the reverse-biased main p-n junction so as to increase the breakdown voltage of the main p-n junction, said active device region and said annular regions being more highly doped than said portion of said one conductivity type, and at least the inner annular region and the active device region each comprise both a deep portion and a shallower portion which extends laterally outwards from the deep portion, said inner annular region and said active device region each having in plan view an outer perimeter in the form of straight sides joined by rounded corners, said shallower portions of each being located at the rounded corners but not along the whole length of the straight sides.