US4599791A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making integrated circuits employing proton-bombarded AlGaAs layers
Assignee: Nokia Bell Labs
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Filing: 1983-11-28
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Granted: 1986-07-15
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Expires: 2003-11-28
Abstract
Abstract The property of materials in the GaAs/AlGaAs system, whereby at certain doses proton bombarded n-type material becomes highly resistive but p-type material remains highly conductive, is utilized to fabrication of integrated circuits which include buried semiconductor interconnections or bus bars between devices.
Inventors
- 👤 Marlin W. Focht
- 👤 Louis A. Koszi
- 👤 Bertram Schwartz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 02:38
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/206; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/05; H10P30/208; H10P30/22; H10P95/00; H10P95/90; H10P95/904; H10W; H10W10/00; H10W10/01; H10W20/00; H10W20/01; H10W20/021; H10W20/20; Y; Y10; Y10S; Y10S148/00; Y10S148/084
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
56 words
A method of manufacturing a device comprising the steps of (a) providing a multi-layered structure containing n-type and p-type layers of AlGaAs, and (b) proton bombarding at least one of said n-type layers and one of said p-type layers at a dose and energy so that only said at least one n-type layer becomes highly resistive.
Claim 2
Independent Claim
56 words
A method of manufacturing a device comprising the steps of (a) providing a multi-layered structure containing n-type and p-type layers of AlGaAs, and (b) proton bombarding at least one of said n-type layers and one of said p-type layers at a dose and energy so that only said at least one n-type layer becomes highly resistive.
Claim 3
Dependent Claim
25 words
A method of claim 1 wherein said bombarding step (b) is performed at a proton dose of less than approxmately 10 14 /cm 2 .
Claim 4
Dependent Claim
40 words
The method of claim 1 including, between steps (a) and (b), the additional step of forming a patterned mask on a surface of said structure, and wherein said proton bombarding step (b) takes place through the openings of said mask.
Claim 5
Independent Claim
95 words
A method of manufacturing an integrated circuit comprising the steps of (a) providing a multi-layered structure containing layers of n-type and p-type AlGaAs, (b) proton bombarding at least one of said n-type layers and one of said p-type layers at a dose and energy so that only said at least one n-type layer becomes highly resistive, and (c) forming at least two separated devices in said structure so that said highly resistive n-type layer electrically isolates said devices from one another and said at least one p-type layer forms a conductive path between said devices.
Claim 6
Independent Claim
95 words
A method of manufacturing an integrated circuit comprising the steps of (a) providing a multi-layered structure containing layers of n-type and p-type AlGaAs, (b) proton bombarding at least one of said n-type layers and one of said p-type layers at a dose and energy so that only said at least one n-type layer becomes highly resistive, and (c) forming at least two separated devices in said structure so that said highly resistive n-type layer electrically isolates said devices from one another and said at least one p-type layer forms a conductive path between said devices.
Claim 7
Dependent Claim
73 words
The method of claim 4 wherein step (a) includes providing a structure comprising a highly conductive p-type layer sandwiched between a pair of n-type layers, step (b) renders said pair of n-type layers highly resistive but leaves said p-type layer highly conductive, and step (c) at least partially embeds said devices in said layers so that said pair of n-type layers bound said p-type layer which forms said conductive path between said devices.
Claim 8
Dependent Claim
42 words
The method of claim 4 wherein said devices are at least partially embedded in said at least one n-type layer and are formed upon said at least one p-type layer which forms a buried bus bar connecting said devices to one another.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-07-14 | 1990-01-13 | 1990-07-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-07-14 | 1994-01-13 | 1994-07-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-07-14 | 1998-01-13 | 1998-07-15 | $7700.00 | Window Closed / Lapsed |