Circuit testing apparatus employing signature analysis

Claim 1

Apparatus for testing an electrical circuit having a first input and a first output, said apparatus comprising, in combination: (a) test control means for applying a test sequence of test signals to said first input of said electrical circuit thereby to evoke, in response to each test signal, a response signal by said electrical circuit at said first output; (b) linear feedback signature register (LFSR) means, having a second output plus a second input, the second input is connected to said first output of said electrical circuit, the LFSR means producing a state signal at said second output representing the current state of said LFSR means, in dependence upon the prior state of said LFSR means and a received response signal; (c) programmed, first read-only-memory (ROM) means, having a first data output plus a first address input, the first address input is connected to said second output of said LFSR means, the first ROM means producing a first signal at said first data output upon receipt of said state signal if said state signal represents a permissible state of said LFSR means within the test sequence of said electrical circuit, and the first ROM means producing a second signal at said first data output upon receipt of said state signal if is said state signal does not represent a permissible state of said LFSR means within the test sequence; and said first read-only-memory means comprising (1) a plurality of ROM units, each having third address inputs and a third data output, said third address inputs of all of said ROM units being connected in parallel to said second output of said LFSR meanas; and (2) enabling means, connected to all of said ROM units, for enabling successive ones of said ROM units in sequence to enable the checking of the state signal at specific points within the test sequence.