US4596071A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making semiconductor devices having dielectric isolation regions
Assignee: Oki Electric Industry Co Ltd
•
Filing: 1984-08-15
•
Granted: 1986-06-24
•
Expires: 2004-08-15
Abstract
Abstract A method of making semiconductor devices having fine dielectric element isolation regions is disclosed. The method comprises the steps of preparing a semiconductor substrate of one conductivity type which is in a high impurity concentration; forming on the surface of the semi-conductor substrate an epitaxial layer having the same conductivity type as that of the semiconductor substrate in a low impurity concentration; etching off selected regions of the epitaxial layer so as to form islands of the epitaxial layer; forming a CVD oxide layer all over the surface of the structure obtained by the steps; applying high-molecular material film all over the surface of the oxide layer; and removing both the oxide layer and the high-molecular material film so as to expose the surface of the islands, whereby fine element isolation regions of the oxide layer are obtained between the islands.
Inventors
- 👤 Akio Kita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 08:22
CPC Classifications
H; H10; H10P; H10P95/00; H10P95/06; H10P95/062; H10P95/064; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/018; H10W10/10
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
146 words
A method of making MOS semiconductor devices comprising the steps of: preparing a single crystalline silicon substrate of one conductivity type which is in a high impurity concentration; forming on the surface of said silicon substrate a silicon epitaxial layer having the same conductivity type as that of said silicon substrate in a low impurity concentration; etching off selected regions of said silicon epitaxial layer so as to form islands of said silicon epitaxial layer; forming a silicon oxide layer all over the surface of the structure obtained by said steps; applying a high-molecular material film all over the surface of said silicon oxide layer; curing said high-molecular material film; and removing both said silicon oxide layer and said high-molecular material film so as to expose surfaces of said islands, whereby fine dielectric element isolation regions of said silicon oxide layer are obtained between said islands.
Claim 2
Independent Claim
146 words
A method of making MOS semiconductor devices comprising the steps of: preparing a single crystalline silicon substrate of one conductivity type which is in a high impurity concentration; forming on the surface of said silicon substrate a silicon epitaxial layer having the same conductivity type as that of said silicon substrate in a low impurity concentration; etching off selected regions of said silicon epitaxial layer so as to form islands of said silicon epitaxial layer; forming a silicon oxide layer all over the surface of the structure obtained by said steps; applying a high-molecular material film all over the surface of said silicon oxide layer; curing said high-molecular material film; and removing both said silicon oxide layer and said high-molecular material film so as to expose surfaces of said islands, whereby fine dielectric element isolation regions of said silicon oxide layer are obtained between said islands.
Claim 3
Dependent Claim
31 words
A method as claimed in claim 1, wherein said silicon substrate is of P-type conductivity, said epitaxial is of P-type conductivity, and said high-molecular material film is a polymide resin film.
Claim 4
Dependent Claim
66 words
A method as claimed in claim 2 wherein said single crystalline silicon layer has an impurity concentration of about 1×10 18 atoms cm -3 , said P-type epitaxially grown silicon layer has an impurity concentration of 1×10 14 atoms cm -3 to 1×10 16 atoms cm -3 and is about 1.7 μm in thickness, and said polyimide resin film is 1 to 10 μm in thickness.
Claim 5
Dependent Claim
30 words
A method as claimed in claim 3 wherein said step of removing both said silicon oxide layer and said high-molecular material film is carried out by a dry etching process.
Claim 6
Dependent Claim
28 words
A method as claimed in claim 4 wherein said dry etching process is carried out in a mixture of a fluorine gas and 1-10% oxygen gas by volume.
Claim 7
Dependent Claim
24 words
A method as claimed in claim 2 further comprising the steps of forming MOS transistor elements in said island regions of said epitaxial layer.
References Cited (Backward Citations)
GB1208578A
Cited
US4101350A
Cited
JPS5618426A
Cited
US4338138A
Cited
US4307180A
Cited
US4505025A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-06-23 | 1989-12-23 | 1990-06-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-06-23 | 1993-12-23 | 1994-06-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-06-23 | 1997-12-23 | 1998-06-24 | $7700.00 | Window Closed / Lapsed |