US4591803A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Linear FET power amplifier
Assignee: Nokia Bell Labs
•
Filing: 1984-05-29
•
Granted: 1986-05-27
•
Expires: 2004-05-29
Abstract
Abstract The present invention relates to an FET power amplifier whose transfer characteristics are parabolic or have a pronounced parabolic region. The amplifier is capable of linear operation due to a drain electrode bias network which includes a pair of serially connected quarter-wave transmission line sections connected at one end thereof to the drain electrode, and the interconnection point of the two quarter-wave transmission line sections is connected to both (a) a bias supply which causes the FET to operate over at least a portion of the parabolic region and (b) to a means which prevents envelope-induced drain bias voltage variations and presents a short-circuit to the drain terminal at a second harmonic of the input signal.
Inventors
- 👤 Adel A. M. Saleh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 06:04
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/60; H03F3/601
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
180 words
A power amplifier arrangement comprising: an input and an output terminal; a field effect transistor (FET) comprising a gate electrode coupled to the input terminal, a source electrode, and a drain electrode coupled to the output terminal, the FET including a transfer characteristic which includes a parabolic region; and drain electrode biasing means comprising (a) a first and a second quarter-wave transmission line section connected in series, one end thereof being connected to the drain electrode while the interconnection point between the two quarter-wave transmission line sections is connected to be responsive to a drain bias from a bias supply to cause the amplifier to operate over a predetermined portion of the parabolic region of the FET transfer characteristics, (b) means connected between the interconnection point of the first and second quarter-wave transmission line sections and the source electrode for preventing envelope-induced variations of the drain bias voltage and for providing a short circuit to the drain electrode for a second harmonic of an input signal, and (c) a blocking capacitor disposed between the drain electrode and the output terminal.
Claim 2
Dependent Claim
180 words
A power amplifier arrangement comprising: an input and an output terminal; a field effect transistor (FET) comprising a gate electrode coupled to the input terminal, a source electrode, and a drain electrode coupled to the output terminal, the FET including a transfer characteristic which includes a parabolic region; and drain electrode biasing means comprising (a) a first and a second quarter-wave transmission line section connected in series, one end thereof being connected to the drain electrode while the interconnection point between the two quarter-wave transmission line sections is connected to be responsive to a drain bias from a bias supply to cause the amplifier to operate over a predetermined portion of the parabolic region of the FET transfer characteristics, (b) means connected between the interconnection point of the first and second quarter-wave transmission line sections and the source electrode for preventing envelope-induced variations of the drain bias voltage and for providing a short circuit to the drain electrode for a second harmonic of an input signal, and (c) a blocking capacitor disposed between the drain electrode and the output terminal.
Claim 3
Dependent Claim
28 words
A power amplifier according to claim 1 wherein the means for preventing envelope-induced drain bias voltage variations and for providing a second harmonic short circuit comprises a capacitance.
Claim 4
Dependent Claim
48 words
A power amplifier according to claim 2 wherein said capacitance comprises: a first capacitor for preventing the envelope-induced variations in the drain bias signal; and a second capacitor disposed in parallel with the first capacitor for shorting the second harmonic of the input signal at the drain electrode.
Claim 5
Dependent Claim
57 words
A power amplifier according to claim 1 wherein the means for preventing drain bias voltage variations and for providing a second harmonic short circuit comprises: a capacitor for preventing the envelope-induced variations in the drain bias signal; and an eighth-wavelength open-circuit transmission line section for shorting the second harmonic of the input signal at the drain electrode.
References Cited (Backward Citations)
US4110700A
Cited
US4342967A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-05-26 | 1989-11-25 | 1990-05-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-05-26 | 1993-11-25 | 1994-05-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-05-26 | 1997-11-25 | 1998-05-27 | $7700.00 | Window Closed / Lapsed |