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Method for fabricating a semiconductor device by co-diffusion of arsenic and phosphorus

Assignee: Toshiba Corp
•
Filing: 1983-08-18
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Granted: 1986-05-20
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Expires: 2003-08-18
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Abstract

Abstract A semiconductor device is fabricated by selectively providing on a surface of a semiconductor body a plurality of impurity diffusion sources each containing an n-type impurity comprising phosphorus and arsenic, at least two of said impurity diffusion sources containing phosphorus and arsenic at a different ratio. The impurity is diffused by a single thermal diffusion step from each impurity diffusion source into the semiconductor body to form a plurality of n-type regions in the semiconductor body. At least two of the n-type regions will then have different diffusion depths.

Inventors

  • 👤 Shigeru Komatsu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 13:40
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/133; H10D84/00; H10D84/01; H10D84/0112; H10D84/0119; H10D84/0121; H10D84/02; H10D84/03; H10D84/038; H10D84/60; H10D84/67; H10D84/673; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 110 words
A method of fabricating a semiconductor device, comprising the steps of: selectively forming on a major surface of a silicon semiconductor substrate a diffusion source layer containing at least one n-type impurity selected from the group consisting of phosphorus and arsenic, and subsequently selectively doping said diffusion source layer with the other impurity, thereby forming at least two diffusion sources having different concentration ratios of phosphorus to arsenic; and diffusing by a single heat treatment said n-type impurities from said diffusion sources into said semiconductor substrate to form a plurality of n-type diffusion regions which correspond to said diffusion sources and at least two of which have different diffusion depths.
Claim 2
Independent Claim 110 words
A method of fabricating a semiconductor device, comprising the steps of: selectively forming on a major surface of a silicon semiconductor substrate a diffusion source layer containing at least one n-type impurity selected from the group consisting of phosphorus and arsenic, and subsequently selectively doping said diffusion source layer with the other impurity, thereby forming at least two diffusion sources having different concentration ratios of phosphorus to arsenic; and diffusing by a single heat treatment said n-type impurities from said diffusion sources into said semiconductor substrate to form a plurality of n-type diffusion regions which correspond to said diffusion sources and at least two of which have different diffusion depths.
Claim 3
Dependent Claim 26 words
A method according to claim 1, wherein arsenic contained in said diffusion sources has a concentration up to about 10 times a concentration of phosphorus therein.
Claim 4
Dependent Claim 13 words
A method according to claim 1, wherein said diffusion sources comprise polycrystalline silicon.
Claim 5
Dependent Claim 44 words
A method according to claim 1, wherein said diffusion sources are formed by first depositing a polycrystalline layer containing one said impurity selected from the group consisting of phosphorus and arsenic, and then selectively ion implanting the other impurity in the polycrystalline silicon layer.
Claim 6
Dependent Claim 32 words
A method according to claim 1, wherein said semiconductor substrate has a plurality of p-type regions separated from each other, and said n-type diffusion regions are formed in said p-type regions, respectively.
Claim 7
Dependent Claim 14 words
A method according to claim 5, wherein said p-type regions have the same depth.
Claim 8
Dependent Claim 25 words
A method according to claim 5, wherein said n-type diffusion regions having different diffusion depths are formed in said p-type regions which have different depths.
Claim 9
Dependent Claim 17 words
A method according to claim 1, wherein p-type regions are formed in said n-type diffusion regions, respectively.
Claim 10
Dependent Claim 17 words
A method according to claim 1, wherein said heat treatment is performed in a dry oxygen atmosphere.
Claim 11
Dependent Claim 26 words
A method according to claim 1, wherein said heat treatment is performed at a temperature in a range between about 900° C. and about 1,000° C.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-05-19 1989-11-18 1990-05-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-05-19 1993-11-18 1994-05-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-05-19 1997-11-18 1998-05-20 $7700.00 Window Closed / Lapsed

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