Multiple module control store for use in a data processing system

Claim 2

Sequencing apparatus for controlling units of a data processing system comprising: first and second control store means, each one of said control store means having locations for storing microinstruction control words for controlling said units, each one of said control store means having locations for storing branch addresses where the branch addresses are accessible with the control words, said branch addresses from said first control store means for addressing said second control store means and said branch addresses from said second control store means for addressing said first control store means, each one of said control store means having means for providing a next-in-order address, and each one of said control store means having selection means for selecting a next-in-order address or a branch address to access a control word and a branch address from the other one of said control store means, output means in communication with said first and second control store means and said units for selecting a control word either from said first control store means or from said second control store means for controlling said units, control means including means for generating a selection signal connected for controlling the sequencing of addresses selected by said selection means in both said first and said second control store means and said control means including means for accessing both said first and second control store means concurrently in the same cycle whereby each of said first and second control store means provides a branch address for the other one of said control store means in said same cycle.

Claim 3

The apparatus of claim 1 wherein said control means includes selection store means for storing said selection signal for indicating which one of the control store means was last selected to provide a control word, and includes logic means for setting said selection signal.

Claim 4

The apparatus of claim 2 wherein said control means includes condition store means for storing a condition signal having different states in accordance with the condition of one of said units and including interrogation means for interrogating said condition store means to determine the state of said condition signal for controlling the selection of said next-in-order address or said branch address and thereby determining whether a branch is taken or not taken.

Claim 5

The apparatus of claim 3 including means for enabling said interrogation means in response to a microinstruction control word selected by said output means.

Claim 6

The apparatus of claim 2 wherein each of said control store means includes an address register for storing a current address for addressing said control store means and includes selection means for gating into said address register the next address for addressing said control store means.

Claim 7

The apparatus of claim 5 wherein each of said control store means includes an incrementer for incrementing by one the current address in said address register to form the next-in-order address.

Claim 8

The apparatus of claim 2 wherein said output means includes latch means for storing the control word selected from said first control store means or from said second control store means.

Claim 9

The apparatus of claim 7 wherein microinstruction control words stored in each of said first control store means and said second control store means are encoded and wherein said output means includes a decoder connected between each of said control store means and said latch means for decoding the selected control word.

Claim 10

Sequencing apparatus for controlling units of a data processing system comprising: first and second control store means, each one of said control store means having locations for storing microinstruction control words for controlling said units, each one of said control store means having locations for storing branch addresses where the branch addresses are accessible with the control words, said branch addresses from said first control store means for addressing said second control store means and said branch addresses from said second control store means for addressing said first control store means, each one of said control store means having means for providing a next-in-order address, and each one of said control store means having selection means for selecting a next-in-order address or a branch address to access a control word and a branch address from the other one of said control store means, output means in communication with said first and second control store means and said units for selecting a control word either from said first control store means or from said second control store means for controlling said units, control means for generating a selection signal connected for controlling the sequencing of addresses selected by said selection means in both said first and said second control store means, wherein said control means includes one or more branch condition stores, enabling means responsive to control words for enabling the setting of said branch condition stores as a function of the state of branch conditions from one or more of said units, interrogation means responsive to a control word for interrogating the state of said branch condition stores, said interrogation means including branch taken indicator means for providing a taken signal indicating whether a branch is taken or not taken, selection store means for storing a selection signal for indicating a selected one of said first control means or said second control means, control logic means responsive to said taken signal from said branch taken indicator means and to said selection signal from said selection store means for controlling the selection of the next-in-order address or the branch address for each of said control store means.

Claim 11

Sequencing apparatus for controlling units of a data processing system comprising: first and second control store means, each one of said control store means having locations for storing microinstruction control words for controlling said units, each one of said control store means having locations for storing branch addresses where the branch addresses are accessible with the control words, said branch addresses from said first control store means for addressing said second control store means and said branch addresses from said second control store means for addressing said first control store means, each one of said control store means having means for providing a next-in-order address, and each one of said control store means having selection means for selecting a next-in-order address or a branch address to access a control word and a branch address from the other one of said control store means, output means in communication with said first and second control store means and said units for selecting a control word either from said first control store means or from said second control store means for controlling said units, control means for generating a selection signal connected for controlling the sequencing of addresses selected by said selection means in both said first and said second control store means, wherein said control means includes one or more branch condition stores, enabling means responsive to control words for enabling the setting of said branch condition stores as a function of the state of branch conditions from one or more of said units, interrogation means responsive to a control word for interrogating the state of said branch condition stores, said interrogation means including branch taken indicator means for providing a taken signal indicating whether a branch is taken or not taken, selection store means for storing a selection signal for indicating a selected one of said first control means or said second control means, control logic means responsive to said taken signal from said branch taken indicator means and to said selection signal from said selection store means for controlling the selection of the next-in-order address or the branch address for each of said control store means.

Claim 12

The apparatus of claim 9 further including general system control means for establishing a starting address as the current address for said first and second control store means and for establishing the state of said selection store means.

Claim 13

The apparatus of claim 10 in which said output means includes selection means for selecting initial conditions from said general system control in a first cycle and for selecting control words from said first and second control store means in subsequent cycles.

Claim 14

The apparatus of claim 10 further including second latch means for storing initial conditions from said general system control means and means for enabling said branch taken indicator means and said interrogation means in response to said initial conditions.

Claim 15

In a data processing system having apparatus including first and second control store means each having locations for storing microinstruction control words for controlling units of said system and each having locations for storing branch addresses accessible with said control words when addressed by first and second current addresses, respectively, the method comprising, accessing in each of a plurality of cycles a first control word and a second control word and a first branch address and a second branch address from said first and second control store means, respectively, addressed by first and second current addresses, selecting in each of said cycles one of said first and second control words to provide a selected control word for controlling said units, incrementing in each of said cycles said first and second current addresses to form first and second next-in-order nonbranch addresses, selecting in each of said cycles either said first next-in-order nonbranch address or said second branch address as the next address for addressing said first control store means in a next cycle, selecting in each of said cycles either said second next-in-order nonbranch address or said first branch address as the next address for addressing said second control store means in said next cycle.

Claim 16

In a data processing system having apparatus including first and second control store means each having locations for storing microinstruction control words for controlling units of said system and each having locations for storing branch addresses accessible with said control words when addressed by first and second current addresses, respectively, the method comprising, accessing in each of a plurality of cycles a first control word and a second control word and a first branch address and a second branch address from said first and second control store means, respectively, addressed by first and second current addresses, selecting in each of said cycles one of said first and second control words to provide a selected control word for controlling said units, incrementing in each of said cycles said first and second current addresses to form first and second next-in-order nonbranch addresses, selecting in each of said cycles either said first next-in-order nonbranch address or said second branch address as the next address for addressing said first control store means in a next cycle, selecting in each of said cycles either said second next-in-order nonbranch address or said first branch address as the next address for addressing said second control store means in said next cycle.

Claim 17

The method of claim 13 wherein said selection of the next address for each of said control store means is conditioned on whether or not a branch specified in said selected control word is taken or not taken.

Claim 18

Sequencing apparatus for controlling units of a data processing system comprising, a plurality of control store means, each one of said control store means having locations for storing microinstruction control words for controlling said units, each one of said control store means having locations for storing branch addresses accessible with said control words when addressed by current addresses, one current address for each of said control store means, said branch addresses from each one of said control store means for addressing another one of said control store means, addressing means in communication with each of said control store means, each for addressing one of said control store means with one of said current addresses to access a current control word and a current branch address, means responsive to one of said units for setting the state of a branch condition, output means in communication with said plurality of control store means for selecting a current control word, said current control word specifying a conditional branch indication from one of said control store means, each of said control store means including incrementer means for incrementing the current address to provide a next-in-order nonbranch address, each of said control store means having next address selection means for selecting either a next-in-order nonbranch address or a branch address to access a new control word and new branch address from said control store means, control means in communication with said plurality of control store means for controlling said next address selection means and for controlling the sequencing of addresses in all of said control store means as a function of the state of said branch condition when said conditional branch indication is present.

Claim 19

Sequencing apparatus for controlling units of a data processing system comprising, a plurality of control store means, each one of said control store means having locations for storing microinstruction control words for controlling said units, each one of said control store means having locations for storing branch addresses accessible with said control words when addressed by current addresses, one current address for each of said control store means, said branch addresses from each one of said control store means for addressing another one of said control store means, addressing means in communication with each of said control store means, each for addressing one of said control store means with one of said current addresses to access a current control word and a current branch address, means responsive to one of said units for setting the state of a branch condition, output means in communication with said plurality of control store means for selecting a current control word, said current control word specifying a conditional branch indication from one of said control store means, each of said control store means including incrementer means for incrementing the current address to provide a next-in-order nonbranch address, each of said control store means having next address selection means for selecting either a next-in-order nonbranch address or a branch address to access a new control word and new branch address from said control store means, control means in communication with said plurality of control store means for controlling said next address selection means and for controlling the sequencing of addresses in all of said control store means as a function of the state of said branch condition when said conditional branch indication is present.

Claim 20

The apparatus of claim 15 wherein said control means includes selection store means for storing selection signals for indicating which one of said control store means is selected to provide a control word and includes logic means for storing a selection signal in said selection store means as a function of said branch indication and the state of said branch condition.

Claim 21

The apparatus of claim 15 wherein said control means includes one or more branch condition stores, enabling means responsive to a control word for enabling the setting of said branch condition stores as a function of the state of branch conditions from one or more of said units, interrogation means responsive to a control word for interrogating the state of said branch condition stores, said interrogation means including branch taken indicator means providing a taken signal indicating whether a branch is taken or not taken, selection store means storing a selection signal for indicating a selected one of said control store means, control logic means responsive to said taken signal from said branch taken indicator means and to said selection signal from said selection store means for controlling the selection of the next-in-order nonbranch address or the branch address for each of said control store means.

Claim 22

Sequencing apparatus for controlling units of a data processing system said system operating in accordance with periodic clock cycles, said sequencing apparatus comprising, a plurality of control store means, each having locations for storing microinstruction control words for controlling said units, each having locations for storing branch addresses accessible with said control words when addressed by current addresses in a current one of said clock cycles, one current address for each of said control store means, said branch addresses from each one of said control store means for addressing another one of said control store means, a plurality of addressing means one for each of said control store means, each for addressing one of said control store means with one of said current addresses to access a current control word and a current branch address in said current one of said clock cycles, means responsive to one of said units for setting the state of a branch condition not later than said current one of said clock cycles, output means in communication with said plurality of control store means and said units for selecting in said current one of said clock cycles a current control word, said control word specifying a conditional branch indication from one of said control store means, each of said control store means including incrementer means for incrementing the current address in said current one of said clock cycles to provide a next-in-order nonbranch address, each of said control store means having next address selection means, operable in said current one of said clock cycles, for selecting either a next-in-order nonbranch address from said incrementer means or a branch address from another of said control store means to access a new control word and new branch address from said control store means in the next one of said clock cycles after said current one of said clock cycles, control means connected for controlling said next address selection means operable in said current one of said clock cycles for controlling said next address selection means to select either said branch address or said nonbranch address in all of said control store means as a function of the state of said branch condition when said conditional branch indication is present.

Claim 23

Sequencing apparatus for controlling units of a data processing system said system operating in accordance with periodic clock cycles, said sequencing apparatus comprising, a plurality of control store means, each having locations for storing microinstruction control words for controlling said units, each having locations for storing branch addresses accessible with said control words when addressed by current addresses in a current one of said clock cycles, one current address for each of said control store means, said branch addresses from each one of said control store means for addressing another one of said control store means, a plurality of addressing means one for each of said control store means, each for addressing one of said control store means with one of said current addresses to access a current control word and a current branch address in said current one of said clock cycles, means responsive to one of said units for setting the state of a branch condition not later than said current one of said clock cycles, output means in communication with said plurality of control store means and said units for selecting in said current one of said clock cycles a current control word, said control word specifying a conditional branch indication from one of said control store means, each of said control store means including incrementer means for incrementing the current address in said current one of said clock cycles to provide a next-in-order nonbranch address, each of said control store means having next address selection means, operable in said current one of said clock cycles, for selecting either a next-in-order nonbranch address from said incrementer means or a branch address from another of said control store means to access a new control word and new branch address from said control store means in the next one of said clock cycles after said current one of said clock cycles, control means connected for controlling said next address selection means operable in said current one of said clock cycles for controlling said next address selection means to select either said branch address or said nonbranch address in all of said control store means as a function of the state of said branch condition when said conditional branch indication is present.

Claim 24

The apparatus of claim 18 wherein said control means includes selection store means for storing selection signals in said current one of said clock cycles for indicating which one of said control store means is active and includes logic means for setting said selection means during said current one of said cycles for use in said next one of said clock cycles as a function of said branch indication and the state of said branch condition in said current one of said clock cycles.

Claim 25

The apparatus of claim 18 wherein said common control means includes one or more branch condition stores, enabling means responsive to a control word for enabling the setting of said branch condition stores in a prior one of said clock cycles prior to said current one of said clock cycles as a function of the state of branch conditions from one or more of said units, interrogation means responsive to a control word accessed in said current one of said clock cycles for interrogating the state of said branch condition stores in said current one of said clock cycles, said interrogation means including branch taken indicator means indicating in said current one of said clock cycles whether a branch is taken or not taken, selection store means storing a selection signal for indicating in said current one of said clock cycles a selected one of said control store means, control logic means responsive to said taken signal from said branch taken indicator means and to said selection signal from said selection store means to determine the state of said condition signal for controlling in said current one of said clock cycles the selection of the next-in-order nonbranch address or the branch address for each of said control store means.