Patent US4584690A successfully refreshed from Google Patents.
US4584690A
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Alternate Mark Invert (AMI) transceiver with switchable detection and digital precompensation
Assignee: DAVID Systems Inc
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Filing: 1984-05-07
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Granted: 1986-04-22
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Expires: 2004-05-07
Abstract
Abstract A high-speed digital transceiver is provided for use in a PBX environment comprising twisted-pair wire cables interconnecting like transceivers, each transceiver being operative to exchange voice, data and control information in a packetized format over a common twisted-pair cable. Specifically, each transceiver communicates packetized pulse code modulated information in pure Alternate Mark Inverted (AMI) coding, that is, without the introduction of bipolar violation pulses to provide timing. Frame synchronization is acquired on the first pulse by the use of a digital circuit deriving synchronization from a local high-speed clock. The use of a high-speed clock-driven digital circuit for synchronization acquisition eliminates the need for a phase-locked loop synchronization scheme and its concomitant finite acquisition delay. In addition, a receiving section employs a threshold selecting circuit which switches or makes thresholds in response to an expectation of the absence any bipolar violation in the transmitted signal. The effect of intersymbol interference are further minimized by provision of digital precompensation in the transmitted signal to maximize the slew rate between consecutive pulses. The precompensation scheme is based on a knowledge of the bit pattern and the amount of energy contained in a sequence of bits.
Inventors
- 👤 Luca Cafiero
- 👤 Mario Mazzola
- 👤 Massimo Prati
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 16:14
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/62; H04L; H04L5/00; H04L5/14; H04L5/1469; H04L5/1484; H04L5/1492; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4917; H04L25/4923; H04L25/4925
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
269 words
An apparatus for transmission and reception of digital data over a bandlimited channel comprising: means for generating and transmitting a pure alternate mark invert pulse code (pure AMIPC, signal from a digital message signal, said pure AMIPC signal being free of bipolar violations; and means for receiving a signal representative of said pure AMIPC signal, said receiving means including means defining a first threshold and a second threshold, said first threshold for identifying positive polarity pulses of said pure AMIPC signal, and said second threshold for identifying negative polarity pulses of said pure AMIPC signal, said first threshold and said second threshold being substantially equal in amplitude, first detecting means coupled to said threshold defining means for only detecting a signal of an amplitude greater than said first threshold, second detecting means coupled to said threshold defining means for only detecting a signal of an amplitude greater than said second threshold, means for simultaneously enabling said first detecting means and said second detecting means until receipt of a first representative signal of arbitrary polarity, said enabling means also for disabling said first detecting means upon receipt of a representative signal of positive polarity until receipt of a representative signal of negative polarity and for disabling said second detecting means upon receipt of a representative signal of negative polarity until receipt of a representative signal of positive polarity and timing means, for establishing a pulse duration of a reconstructed pulse for each said representative signal of positive polarity and negative polarity, said pulse duration being independent of duration of said representative signal in order to minimize effects of intersymbol interference.
Claim 2
Independent Claim
269 words
An apparatus for transmission and reception of digital data over a bandlimited channel comprising: means for generating and transmitting a pure alternate mark invert pulse code (pure AMIPC, signal from a digital message signal, said pure AMIPC signal being free of bipolar violations; and means for receiving a signal representative of said pure AMIPC signal, said receiving means including means defining a first threshold and a second threshold, said first threshold for identifying positive polarity pulses of said pure AMIPC signal, and said second threshold for identifying negative polarity pulses of said pure AMIPC signal, said first threshold and said second threshold being substantially equal in amplitude, first detecting means coupled to said threshold defining means for only detecting a signal of an amplitude greater than said first threshold, second detecting means coupled to said threshold defining means for only detecting a signal of an amplitude greater than said second threshold, means for simultaneously enabling said first detecting means and said second detecting means until receipt of a first representative signal of arbitrary polarity, said enabling means also for disabling said first detecting means upon receipt of a representative signal of positive polarity until receipt of a representative signal of negative polarity and for disabling said second detecting means upon receipt of a representative signal of negative polarity until receipt of a representative signal of positive polarity and timing means, for establishing a pulse duration of a reconstructed pulse for each said representative signal of positive polarity and negative polarity, said pulse duration being independent of duration of said representative signal in order to minimize effects of intersymbol interference.
Claim 3
Independent Claim
149 words
An apparatus for transmitting and receiving digital data over a bandlimited channel comprising: means for generating and transmitting a pure alternate mark invert pulse code signal from a digital message signal, said pure alternate mark invert pulse code signals being free of bipolar violations, said generating and transmitting means including means for specifying discrete values for amplitude and duration of generated pulses of said pure alternate mark invert pulse code signal prior to transmission in response to the sequence of binary digital values of preceding generated pulses, said adjusting means constraining each of said generated pulses to consist of a substantially equal amount of energy, for suppressing the effects of intersymbol interference on a signal received as a representation of a sequence of pulses at a receiving means and for simplifying detection; and means for receiving and detecting alternate mark invert code pulse signals to recover said digital message.
Claim 4
Independent Claim
149 words
An apparatus for transmitting and receiving digital data over a bandlimited channel comprising: means for generating and transmitting a pure alternate mark invert pulse code signal from a digital message signal, said pure alternate mark invert pulse code signals being free of bipolar violations, said generating and transmitting means including means for specifying discrete values for amplitude and duration of generated pulses of said pure alternate mark invert pulse code signal prior to transmission in response to the sequence of binary digital values of preceding generated pulses, said adjusting means constraining each of said generated pulses to consist of a substantially equal amount of energy, for suppressing the effects of intersymbol interference on a signal received as a representation of a sequence of pulses at a receiving means and for simplifying detection; and means for receiving and detecting alternate mark invert code pulse signals to recover said digital message.
Claim 5
Dependent Claim
74 words
The apparatus according to claim 1 wherein said generating and transmitting means includes means for specifying discrete values for amplitude and duration of generated pulses of pure alternate mark inverted pulse code signals, said specifying means constraining each of said generated pulses to contain a substantially equal amount of energy in response to the sequence of binary digital values of preceding message signals in order to minimize effects of intersymbol interference in received signals.
Claim 6
Dependent Claim
37 words
The apparatus according to claim 3 wherein said specifying means comprises means operative to select said amplitude and duration value of each transmitted pulse signal to maximize slew rate while maintaining approximately equal energy content among pulses.
Claim 7
Dependent Claim
108 words
The apparatus according to claim 3 wherein said specifying means comprises: a shift register for receiving said message signals; a programmable read only memory means coupled to receive outputs of said shift register as most significant bits of addresses for selecting sectors of said memory means; a digital counter coupled to least significant bits of addresses of said memory means for generating a sequence of addresses to read out data in sectors selected by message signals to said shift register; and means for converting said data from said sectors of said memory means to analog signals of substantially discrete amplitude and substantially discrete duration determined by said data.
Claim 8
Dependent Claim
30 words
The apparatus according to claim 1 further including means for selecting polarity of a local high-speed clock in response to polarity of the first pulse of said representative pulse signals.
Claim 9
Dependent Claim
41 words
The apparatus according to claim 1 further including data window means for detecting for presence or absence of said reconstructed pulse indicating a logic one or logic zero, respectively, in order to reconstruct the digital message of said digital message signal.
Claim 10
Dependent Claim
62 words
The apparatus according to claim 1, 2, 3, 4, or 5 wherein said receiving means includes digital means for acquiring synchronization of data windows to each first one of said received pulse signals, said received pulse signals being in a packet format of limited duration, said synchronization acquiring means including a local high precision clock for maintaining synchronization for said limited duration.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-04-21 | 1989-10-21 | 1990-04-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-04-21 | 1993-10-21 | 1994-04-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-04-21 | 1997-10-21 | 1998-04-22 | $7700.00 | Window Closed / Lapsed |