US4071692A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Data transmission systems
Assignee: International Standard Electric Corp
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Filing: 1976-10-08
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Granted: 1978-01-31
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Expires: 1996-10-08
Abstract
Abstract Intelligence is conveyed in a PCM bit stream form with alternate bits being inverted. Additional information is conveyed by violations of the alternate bit rule so that two successive bits have the same polarity. Prior to being coupled to the alternate mark inversion coder a pseudo-random bit stream is mixed by binary addition without carry to the intelligence bit stream to maintain low DC level in the transmitted mixed bit stream and to maintain bit transitions relatively high.
Inventors
- 👤 Donald A. Weir
- 👤 Eric S. Usher
- 👤 George A. Howells
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 13:57
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4917; H04L25/4923; H04L25/4925; H04L25/45
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
326 words
A data transmission system in which intelligence is conveyed in a pulse code modulation (PCM) bit stream form with alternate bits of a first significance inverted comprising: first means to convey additional information to said intelligence by violations of a rule that alternate bits of said first significance are inverted, so that two successive bits of said first significance with the same polarity indicates the presence of said additional information; second means coupled to the input of said first means to mix said bit stream with a pseudo-random bit stream prior to operation of said first means, the output signal of said first means being transmitted; said second means mixing said bit stream and said pseudo-random bit stream by binary addition without carry; said first means providing synchronization information for transmission in said bit stream by violating the alternate inversion rule with respect to a first bit of each PCM bit combination at least once in each PCM frame, and signalling information being conveyed by violating the alternate inversion rule with respect to a bit of each PCM bit combination other than said first bit; and a line decoder coupled to the output of said first means to provide a first output signal when a bit of said first significance has a first polarity and a second output signal when a bit of said first significance has a second polarity; a first bistable means coupled to said line decoder changing its state on each bit of said first significance; a second bistable means coupled to said line decoder changing its state as the polarity of the bits of said first significance alternates; and comparison means coupled to said first and second bistable means to compare the states of said first and second bistable means to provide an output signal when the states of said first and second bistable means are out of step, said output signal indicating that a violation of said rule has taken place.
Claim 2
Dependent Claim
326 words
A data transmission system in which intelligence is conveyed in a pulse code modulation (PCM) bit stream form with alternate bits of a first significance inverted comprising: first means to convey additional information to said intelligence by violations of a rule that alternate bits of said first significance are inverted, so that two successive bits of said first significance with the same polarity indicates the presence of said additional information; second means coupled to the input of said first means to mix said bit stream with a pseudo-random bit stream prior to operation of said first means, the output signal of said first means being transmitted; said second means mixing said bit stream and said pseudo-random bit stream by binary addition without carry; said first means providing synchronization information for transmission in said bit stream by violating the alternate inversion rule with respect to a first bit of each PCM bit combination at least once in each PCM frame, and signalling information being conveyed by violating the alternate inversion rule with respect to a bit of each PCM bit combination other than said first bit; and a line decoder coupled to the output of said first means to provide a first output signal when a bit of said first significance has a first polarity and a second output signal when a bit of said first significance has a second polarity; a first bistable means coupled to said line decoder changing its state on each bit of said first significance; a second bistable means coupled to said line decoder changing its state as the polarity of the bits of said first significance alternates; and comparison means coupled to said first and second bistable means to compare the states of said first and second bistable means to provide an output signal when the states of said first and second bistable means are out of step, said output signal indicating that a violation of said rule has taken place.
Claim 3
Dependent Claim
309 words
A data transmission system in which intelligence is conveyed in a pulse code modulation (PCM) bit stream form with alternate bits of a first significance inverted comprising: first means to convey additional information to said intelligence by violations of a rule that alternate bits of said first significance are inverted, so that two successive bits of said first significance with the same polarity indicates the presence of said additional information; second means coupled to the input of said first means to mix said bit stream with a pseudo-random bit stream prior to operation of said first means, the output signal of said first means being transmitted; said first means providing synchronization information for transmission in said bit stream by violating the alternate inversion rule with respect to a first bit of each PCM bit combination at least once in each PCM frame, and signalling information being conveyed by violating the alternate inversion rule with respect to a bit of each PCM bit combination other than said first bit; and a line decoder coupled to the output of said first means to provide a first output signal when a bit of said first significance has a first polarity and a second output signal when a bit of said first significance has a second polarity; a first bistable means coupled to said line decoder changing its state on each bit of said first significance; a second bistable means coupled to said line decoder changing its state as the polarity of the bits of said first significance alternates; and comparison means coupled to said first and second bistable means to compare the states of said first and second bistable means to provide an output signal when the states of said first and second bistable means are out of step, said output signal indicating that a violation of said rule has taken place.
Claim 4
Dependent Claim
309 words
A data transmission system in which intelligence is conveyed in a pulse code modulation (PCM) bit stream form with alternate bits of a first significance inverted comprising: first means to convey additional information to said intelligence by violations of a rule that alternate bits of said first significance are inverted, so that two successive bits of said first significance with the same polarity indicates the presence of said additional information; second means coupled to the input of said first means to mix said bit stream with a pseudo-random bit stream prior to operation of said first means, the output signal of said first means being transmitted; said first means providing synchronization information for transmission in said bit stream by violating the alternate inversion rule with respect to a first bit of each PCM bit combination at least once in each PCM frame, and signalling information being conveyed by violating the alternate inversion rule with respect to a bit of each PCM bit combination other than said first bit; and a line decoder coupled to the output of said first means to provide a first output signal when a bit of said first significance has a first polarity and a second output signal when a bit of said first significance has a second polarity; a first bistable means coupled to said line decoder changing its state on each bit of said first significance; a second bistable means coupled to said line decoder changing its state as the polarity of the bits of said first significance alternates; and comparison means coupled to said first and second bistable means to compare the states of said first and second bistable means to provide an output signal when the states of said first and second bistable means are out of step, said output signal indicating that a violation of said rule has taken place.
Claim 5
Dependent Claim
264 words
A data transmission system in which intelligence is conveyed in a pulse code modulation (PCM) bit stream form with alternate bits of a first significance inverted comprising: first means to convey additional information to said intelligence by violations of a rule that alternate bits of said first significance are inverted, so that two successive bits of said first significance with the same polarity indicates the presence of said additional information; second means coupled to the input of said first means to mix said bit stream with a pseudo-random bit stream prior to operation of said first means, the output signal of said first means being transmitted; said second means mixing said bit stream and said pseudo-random bit stream by binary addition without carry; and a line decoder coupled to the output of said first means to provide a first output signal when a bit of said first significance has a first polarity and a second output signal when a bit of said first significance has a second polarity; a first bistable means coupled to said line decoder changing its state on each bit of said first significance; a second bistable means coupled to said line decoder changing its state as the polarity of the bits of said first significance alternates; and comparison means coupled to said first and second bistable means to compare the states of said first and second bistable means to provide an output signal when the states of said first and second bistable means are out of step, said output signal indicating that a violation of said rule has taken place.
Claim 6
Dependent Claim
264 words
A data transmission system in which intelligence is conveyed in a pulse code modulation (PCM) bit stream form with alternate bits of a first significance inverted comprising: first means to convey additional information to said intelligence by violations of a rule that alternate bits of said first significance are inverted, so that two successive bits of said first significance with the same polarity indicates the presence of said additional information; second means coupled to the input of said first means to mix said bit stream with a pseudo-random bit stream prior to operation of said first means, the output signal of said first means being transmitted; said second means mixing said bit stream and said pseudo-random bit stream by binary addition without carry; and a line decoder coupled to the output of said first means to provide a first output signal when a bit of said first significance has a first polarity and a second output signal when a bit of said first significance has a second polarity; a first bistable means coupled to said line decoder changing its state on each bit of said first significance; a second bistable means coupled to said line decoder changing its state as the polarity of the bits of said first significance alternates; and comparison means coupled to said first and second bistable means to compare the states of said first and second bistable means to provide an output signal when the states of said first and second bistable means are out of step, said output signal indicating that a violation of said rule has taken place.
Claim 7
Dependent Claim
247 words
A data transmission system in which intelligence is conveyed in a pulse code modulation (PCM) bit stream form with alternate bits of a first significance inverted comprising: first means to convey additional information to said intelligence by violations of a rule that alternate bits of said first significance are inverted, so that two successive bits of said first significance with the same polarity indicates the presence of said additional information; second means coupled to the input of said first means to mix said bit stream with a pseudo-random bit stream prior to operation of said first means, the output signal of said first means being transmitted; and a line decoder coupled to the output of said first means to provide a first output signal when a bit of said first significance has a first polarity and a second output signal when a bit of said first significance has a second polarity; a first bistable means coupled to said line decoder changing its state on each bit of said first significance; a second bistable means coupled to said line decoder changing its state as the polarity of the bits of said first significance alternates; and comparison means coupled to said first and second bistable means to compare the states of said first and second bistable means to provide an output signal when the states of said first and second bistable means are out of step, said output signal indicating that a violation of said rule has taken place.
Claim 8
Dependent Claim
247 words
A data transmission system in which intelligence is conveyed in a pulse code modulation (PCM) bit stream form with alternate bits of a first significance inverted comprising: first means to convey additional information to said intelligence by violations of a rule that alternate bits of said first significance are inverted, so that two successive bits of said first significance with the same polarity indicates the presence of said additional information; second means coupled to the input of said first means to mix said bit stream with a pseudo-random bit stream prior to operation of said first means, the output signal of said first means being transmitted; and a line decoder coupled to the output of said first means to provide a first output signal when a bit of said first significance has a first polarity and a second output signal when a bit of said first significance has a second polarity; a first bistable means coupled to said line decoder changing its state on each bit of said first significance; a second bistable means coupled to said line decoder changing its state as the polarity of the bits of said first significance alternates; and comparison means coupled to said first and second bistable means to compare the states of said first and second bistable means to provide an output signal when the states of said first and second bistable means are out of step, said output signal indicating that a violation of said rule has taken place.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-01-30 | 1981-08-01 | 1982-01-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-01-30 | 1985-08-01 | 1986-01-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-01-30 | 1989-08-01 | 1990-01-31 | $7700.00 | Window Closed / Lapsed |