Digital time fuze method and apparatus

Claim 2

A digital timing apparatus for providing an output signal at a selected and precise time interval following the occurrence of a start signal and in accordance with time interval data which is contained within a charge/set signal, the charge/set signal including a charging portion having a charge level and a setting portion which are separated by a single transition to a predetermined threshold level, wherein the time interval data is designated by a continuous interval of the charge/set signal throughout which the predetermined threshold level is attained, the apparatus comprising oscillator means for providing a clock signal having a series of clock pulses; control means responsive to the charge/set signal, the start signal and the clock signal, for providing an accumulate signal, the control means including means for detecting the duration of the continuous interval in the charge/set signal beginning at the single transition between the charge portion and the setting portion, and for inserting an interval of the clock signal into the accumulate signal which clock signal interval has a length determined by the duration of the continuous interval, and for providing a count-down signal which is initiated by the start signal and which has a frequency rate which is derived from the clock signal frequency; and counter means responsive to the count-down signal and to the accumulate signal for counting the number of clock pulses in the accumulate signal to form a timer count, and for counting down from the timer count in accordance with the frequency rate of the count-down signal, the counter means providing the output signal when the count reaches a predetermined count state.

Claim 3

The digital timing apparatus, as recited in claim 1, wherein the charge/set signal includes a power-up interval, the apparatus further including energy storage means for storing the energy provided in the set signal power-up interval and for providing all operating power to the apparatus.

Claim 4

The digital timing apparatus, as recited in claim 1, wherein the oscillator means is a crystal controlled oscillator.

Claim 5

The digital timing apparatus, as recited in claim 1, wherein the counter means is an up-down counter.

Claim 6

The digital timing apparatus, as recited in claim 1, further including driver means responsive to the output signal for providing a high energy output pulse.

Claim 7

The digital timing apparatus, as recited in claim 5, wherein the driver means is a regenerative switch.

Claim 8

The apparatus, as recited in claim 5, wherein the charge/set signal includes a power-up interval for supplying energy to the apparatus, and furtherwherein the apparatus includes capacitor means for storing the energy from the power-up interval, the capacitor means having the capacity to store sufficient energy to provide all operating power to the apparatus, including the energy for the high energy output pulse.

Claim 9

The apparatus, as recited in claim 2, wherein the energy storage means is a capacitor.

Claim 10

The apparatus, as recited in claim 1, wherein the start signal is provided by a switch closure.

Claim 11

The apparatus, as recited in claim 9, wherein the switch closure is provided by an inertial switch.

Claim 12

The apparatus, as recited in claim 1, wherein the control means further include initializing means, which are responsive to the charge/set signal, for resetting the control means and for presetting the counter means within a predetermined interval following the application of the charge/set signal.

Claim 13

The apparatus, as recited in claim 1, wherein the charge/set signal is applied to the apparatus on a charge line and on a set line, which is separate from the charge line, and furtherwherein the control means is responsive to the set line signal to provide the accumulate signal to the counter means, the apparatus further including energy storage means responsive to the signal on the charge line for storing the energy provided in the charge line signal and for providing all operating power to the apparatus.

Claim 14

The apparatus, as recited in claim 1, wherein the charge/set signal includes positive and negative voltage levels, and furtherwherein the control means further include rectifying means for receiving the charge/set signal, the rectifying means providing only the positive voltage level portions of the charge/set signal to the control means for further processing.

Claim 15

The apparatus, as recited in claim 13, in which the time interval data in the set line signal comprises a designated interval of positive voltage, and wherein the control means further include decoder means for deriving the length of the positive voltage interval from the set line signal, and furtherwherein the accumulate signal provided by the control means includes an interval of the clock signal which has a length substantially equal to the length of the positive voltage interval.

Claim 16

The apparatus, as recited in claim 1, wherein the oscillator means is a piezoceramic controlled oscillator.

Claim 17

A digital timing apparatus for Providing an output signal at a selected and precise time interval following the occurrence of a start signal and in accordance with time interval data which is contained within a charge/set signal, wherein the charge/set signal time interval data is designated by a portion of the charge/set signal having a predetermined voltage level which is different from the remainder of the charge/set signal and separated therefrom by single transitions to and from the predetermined voltage level the apparatus comprising oscillator means for providing a clock signal having a series of clock pulses; control means responsive to the charge/set signal, the start signal and the clock signal, for providing an accumulate signal which includes an interval of the clock signal the length of which is determined in accordance with the charge/set signal time interval data, and for providing a count-down signal which is initiated by the start signal and which has a frequency rate which is derived from the clock signal frequency and wherein the control means comprise means responsive to the charge/set signal for generating a count-up pulse which begins at the single transition to the predetermined voltage level; gate means responsive to a count-up pulse and the clock signal for providing the accumulate signal wherein the clock signal is included in the accumulate signal whenever the charge/set signal is at the predetermined voltage level, the count-up pulse being derived from the time interval data; and scaling counter means responsive to the clock signal and the start signal for providing the count-down signal, wherein the count-down signal is proportional to the clock signal according to a predetermined ratio; and counter means responsive to the count-down signal and to the accumulate signal, wherein the counter means counts the number of clock pulses in the accumulate signal to form a timer count, and further wherein the counter means counts down from the timer count in accordance with the frequency rate of the count-down signal, the counter means providing the output signal when the count reaches a predetermined count state.

Claim 18

A digital timing apparatus for Providing an output signal at a selected and precise time interval following the occurrence of a start signal and in accordance with time interval data which is contained within a charge/set signal, wherein the charge/set signal time interval data is designated by a portion of the charge/set signal having a predetermined voltage level which is different from the remainder of the charge/set signal and separated therefrom by single transitions to and from the predetermined voltage level the apparatus comprising oscillator means for providing a clock signal having a series of clock pulses; control means responsive to the charge/set signal, the start signal and the clock signal, for providing an accumulate signal which includes an interval of the clock signal the length of which is determined in accordance with the charge/set signal time interval data, and for providing a count-down signal which is initiated by the start signal and which has a frequency rate which is derived from the clock signal frequency and wherein the control means comprise means responsive to the charge/set signal for generating a count-up pulse which begins at the single transition to the predetermined voltage level; gate means responsive to a count-up pulse and the clock signal for providing the accumulate signal wherein the clock signal is included in the accumulate signal whenever the charge/set signal is at the predetermined voltage level, the count-up pulse being derived from the time interval data; and scaling counter means responsive to the clock signal and the start signal for providing the count-down signal, wherein the count-down signal is proportional to the clock signal according to a predetermined ratio; and counter means responsive to the count-down signal and to the accumulate signal, wherein the counter means counts the number of clock pulses in the accumulate signal to form a timer count, and further wherein the counter means counts down from the timer count in accordance with the frequency rate of the count-down signal, the counter means providing the output signal when the count reaches a predetermined count state.

Claim 19

The digital timing apparatus, as recited in claim 16, wherein the control means further include decoding means for deriving the time interval data from the charge/set signal.

Claim 20

The digital timing apparatus, as recited in claim 16, wherein the predetermined ratio of the scaling counter means is 1000:1.

Claim 21

The apparatus, as recited in claim 16, wherein the time interval data comprises the length of the predetermined voltage level portion of the charge/set signal, further including decoding means for detecting the length of the predetermined voltage level portion and for supplying the count-up pulse, the count-up pulse having substantially the same width as the detected length.

Claim 22

The apparatus, as recited in claim 16, wherein the length of the clock interval which is included in the accumulate signal is substantially equal to the length of the portion of the charge/set signal which has the predetermined voltage level.

Claim 23

The apparatus, as recited in claim 1 or 16, wherein the control means receive the charge/set signal on a single line.

Claim 28

The method, as recited in claim 23 wherein the clock frequency dividing step the clock frequency is divided by 1000.

Claim 29

A single wire digital timing apparatus for providing an output pulse at a selected and precise time period following the occurrence of a start signal, in accordance with time interval data contained within a charge/set signal, wherein the time interval data are separated from the remainder of the charge/set signal by single transitions to a predetermined voltage level, the apparatus comprising a crystal oscillator for providing a clock signal; detector means responsive to the single transitions in the charge/set signal for deriving the time interval data from the charge/set signal and for providing a count-up pulse having a width determined by the time interval data; gate means responsive to the count-up pulse and to the clock signal for providing an accumulate signal which includes the clock signal whenever the count-up pulse is present; frequency divider means responsive to the start signal and to the clock signal for providing a count-down signal which is initiated by the start signal and which has a frequency which is proportional to and derived from the clock frequency; and an up-down binary counter responsive to the accumulate signal and to the count-down signal, wherein the counter counts the number of pulses present in the accumulate signal to form a timer count and further wherein upon initiation of the count-down signal, the counter counts down from the timer count at the count-down signal rate, the counter thereafter providing the output pulse when the count reaches zero.

Claim 30

A single wire digital timing apparatus for providing an output pulse at a selected and precise time period following the occurrence of a start signal, in accordance with time interval data contained within a charge/set signal, wherein the time interval data are separated from the remainder of the charge/set signal by single transitions to a predetermined voltage level, the apparatus comprising a crystal oscillator for providing a clock signal; detector means responsive to the single transitions in the charge/set signal for deriving the time interval data from the charge/set signal and for providing a count-up pulse having a width determined by the time interval data; gate means responsive to the count-up pulse and to the clock signal for providing an accumulate signal which includes the clock signal whenever the count-up pulse is present; frequency divider means responsive to the start signal and to the clock signal for providing a count-down signal which is initiated by the start signal and which has a frequency which is proportional to and derived from the clock frequency; and an up-down binary counter responsive to the accumulate signal and to the count-down signal, wherein the counter counts the number of pulses present in the accumulate signal to form a timer count and further wherein upon initiation of the count-down signal, the counter counts down from the timer count at the count-down signal rate, the counter thereafter providing the output pulse when the count reaches zero.

Claim 31

A digital timing apparatus for providing an output signal at a selected and precise time interval following the occurrence of a start signal and in accordance with time interval data which is contained within a charge/set signal, wherein the charge/set signal has a charge portion of a predetermined polarity and a time interval data portion, and further wherein the time interval data is designated by a continuous interval of the charge/set signal throughout which a predetermined threshold level is attained, the apparatus comprising oscillator means for providing a clock signal having a series of clock pulses; control means responsive to the charge/set signal, the start signal and the clock signal, for providing an accumulate signal, the control means including means for detecting the duration of the portion of the continuous interval in the charge/set signal which has the same polarity as the charge portion and for inserting an interval of the clock signal into the accumulate signal which clock signal interval has a length determined by the duration of the continuous interval, and for providing a count-down signal which is initiated by the start signal and which has a frequency rate which is derived from the clock signal frequency; and counter means responsive to the count-down signal and to the accumulate signal for counting the number of clock pulses in the accumulate signal to form a timer count, and for counting down from the timer count in accordance with the frequency rate of the count-down signal, the counter means providing the output signal when the count reaches a predetermined count state.

Claim 32

A digital timing apparatus for providing an output signal at a selected and precise time interval following the occurrence of a start signal and in accordance with time interval data which is contained within a charge/set signal, wherein the charge/set signal has a charge portion of a predetermined polarity and a time interval data portion, and further wherein the time interval data is designated by a continuous interval of the charge/set signal throughout which a predetermined threshold level is attained, the apparatus comprising oscillator means for providing a clock signal having a series of clock pulses; control means responsive to the charge/set signal, the start signal and the clock signal, for providing an accumulate signal, the control means including means for detecting the duration of the portion of the continuous interval in the charge/set signal which has the same polarity as the charge portion and for inserting an interval of the clock signal into the accumulate signal which clock signal interval has a length determined by the duration of the continuous interval, and for providing a count-down signal which is initiated by the start signal and which has a frequency rate which is derived from the clock signal frequency; and counter means responsive to the count-down signal and to the accumulate signal for counting the number of clock pulses in the accumulate signal to form a timer count, and for counting down from the timer count in accordance with the frequency rate of the count-down signal, the counter means providing the output signal when the count reaches a predetermined count state.