US3622987A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Count comparison circuit
Assignee: United States Department of the Army
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Filing: 1969-05-05
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Granted: 1971-11-23
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Expires: 1989-05-05
Abstract
Abstract Disclosed is a count comparison circuit for use in artillary fuze timers and the like. The comparison circuit comprises a counting register and a storage register. The complement of the number to be detected is stored in the storage register. OR gates are coupled to the corresponding stages of the registers and when the count is reached the OR gates activate and AND gate to produce an electrical output.
Inventors
- 👤 Harold Borkan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 23:21
CPC Classifications
F; F42; F42C; F42C11/00; H; H03; H03K; H03K23/00; H03K23/64; H03K23/66
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
121 words
A circuit for detecting a preselected count comprising a count accumulator for sequentially accumulating a count, said accumulator having at least n stages each capable of assuming one of at least 2 states, a storage device having at least n stages each capable of assuming one of at least two cOrresponding states, means for setting said stages of said storage device into states representative of the complement of said count, means coupled to the n stages of both said count accumulator and said storage device for producing an output when n successive stages of the accumulator and storage device are in complementary states and a load circuit for responding to the output and terminating further operation of the count detecting circuit.
Claim 2
Dependent Claim
121 words
A circuit for detecting a preselected count comprising a count accumulator for sequentially accumulating a count, said accumulator having at least n stages each capable of assuming one of at least 2 states, a storage device having at least n stages each capable of assuming one of at least two cOrresponding states, means for setting said stages of said storage device into states representative of the complement of said count, means coupled to the n stages of both said count accumulator and said storage device for producing an output when n successive stages of the accumulator and storage device are in complementary states and a load circuit for responding to the output and terminating further operation of the count detecting circuit.
Claim 3
Dependent Claim
50 words
A circuit according to claim 1, wherein said stages of said count accumulator and said storage device are binary stages, said accumulator accumulating a count A, where A < 2n - 1,said storage device including means for setting its stages to states representative of 2n - 1 ) - A.
Claim 4
Dependent Claim
19 words
A circuit according to claim 2 wherein said count accumulator and said storage device are both parallel output registers.
Claim 5
Dependent Claim
19 words
A circuit according to claim 2 wherein said count accumulator is a serial input/parallel output n-stage binary shift register.
Claim 6
Dependent Claim
16 words
A circuit according to claim 2 wherein said coupling means comprises a plurality of logic gates.
Claim 7
Dependent Claim
57 words
A circuit according to claim 5 including n first gates of the same type each having two inputs coupled to corresponding stages of said count accumulator and said storage device, respectively and a second gate of a different type having n inputs, each input of said second gate being coupled to the output of respective first gate.
Claim 8
Dependent Claim
21 words
A circuit according to claim 6 wherein said first gates are OR gates, and said second gate is an AND gate.
Claim 9
Dependent Claim
20 words
A timing circuit according to claim 6 including a pulse timer source coupled to the input of said count accumulator.
Claim 10
Dependent Claim
24 words
A timing circuit according to claim 8 wherein said pulse timer is a fuze timer and said load circuit is a projectile arming circuit.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-22 | 1975-05-24 | 1975-11-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-22 | 1979-05-24 | 1979-11-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-22 | 1983-05-24 | 1983-11-23 | $7700.00 | Window Closed / Lapsed |