Patent US4571548A successfully refreshed from Google Patents.
US4571548A
Expired / Lapsed
US
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Floating limiter circuit
Assignee: Honeywell Inc
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Filing: 1983-02-14
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Granted: 1986-02-18
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Expires: 2003-02-14
Abstract
Abstract A floating limiter circuit for reducing interference from high frequency, very large pulses or fast rise time pulses, without distorting the desired signal. The reference voltage for the limiter circuit is established by the envelope of the desired output signal, thereby allowing the desired signal to vary over a wide dynamic range.
Inventors
- 👤 Lavell Jordan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 11:53
CPC Classifications
H; H03; H03G; H03G11/00; H03G11/04; H03G11/02
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
179 words
A floating limiter circuit for reducing interference pulses in a signal, comprising: circuit input and circuit output; first and second buffer amplifiers, each having an input and output; a low pass filter having its input connected to the circuit input and having its output connected to the input of said first buffer amplifier; a pair of diodes connected in parallel and in opposite polarity between the input of said low pass filter and the output of said second buffer amplifier; means connecting the output of said first buffer amplifier to said circuit output and to the input of said second buffer amplifier; and a capacitor connected between said output of said second buffer amplifier and a source of reference potential, whereby the voltage at the output of said second buffer amplifier is equal to the envelope amplitude of the signal appearing at the input of said low pass filter and any interference pulses appearing at the circuit input are limited by the action of said pair of diodes and prevented from distorting the desired signal at the circuit output.
Claim 2
Dependent Claim
179 words
A floating limiter circuit for reducing interference pulses in a signal, comprising: circuit input and circuit output; first and second buffer amplifiers, each having an input and output; a low pass filter having its input connected to the circuit input and having its output connected to the input of said first buffer amplifier; a pair of diodes connected in parallel and in opposite polarity between the input of said low pass filter and the output of said second buffer amplifier; means connecting the output of said first buffer amplifier to said circuit output and to the input of said second buffer amplifier; and a capacitor connected between said output of said second buffer amplifier and a source of reference potential, whereby the voltage at the output of said second buffer amplifier is equal to the envelope amplitude of the signal appearing at the input of said low pass filter and any interference pulses appearing at the circuit input are limited by the action of said pair of diodes and prevented from distorting the desired signal at the circuit output.
Claim 3
Dependent Claim
22 words
Apparatus according to claim 1, wherein a resistor is connected between the circuit input and the input of said low pass filter.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-02-17 | 1989-08-19 | 1990-02-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-02-17 | 1993-08-19 | 1994-02-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-02-17 | 1997-08-19 | 1998-02-18 | $7700.00 | Window Closed / Lapsed |