US4204170A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Impulse noise limiter circuit
Assignee: NEC Corp
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Filing: 1978-01-06
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Granted: 1980-05-20
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Expires: 1998-01-06
Abstract
Abstract An impulse noise limiter circuit comprises a delay circuit for delaying a signal containing impulse noise and a clamp circuit provided between the input and output terminals of the delay circuit for limiting the voltage difference between the terminals to a given value.
Inventors
- 👤 Kouzou Kage
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 16:29
CPC Classifications
H; H03; H03G; H03G11/00; H03G11/002; H03K; H03K5/00; H03K5/01; H03K5/08; H03K5/082; H03K5/125; H03K5/1252
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
118 words
An impulse noise limiter circuit for removing impulse noise contained in a signal, comprising: a delay circuit having an input and an output for delaying said signal; a voltage follower circuit having an inverting input, a non-inverting input and an output, the output of said delay circuit being connected to said non-inverting input and the output of said voltage follower circuit being coupled to said inverting input; and a pair of diodes connected in parallel and in opposite polarity to each other and connected between the input of said delay circuit and the output of said voltage follower circuit, whereby said voltage follower circuit provides isolation between the output of the delay circuit and said pair of diodes.
Claim 2
Dependent Claim
118 words
An impulse noise limiter circuit for removing impulse noise contained in a signal, comprising: a delay circuit having an input and an output for delaying said signal; a voltage follower circuit having an inverting input, a non-inverting input and an output, the output of said delay circuit being connected to said non-inverting input and the output of said voltage follower circuit being coupled to said inverting input; and a pair of diodes connected in parallel and in opposite polarity to each other and connected between the input of said delay circuit and the output of said voltage follower circuit, whereby said voltage follower circuit provides isolation between the output of the delay circuit and said pair of diodes.
Claim 3
Dependent Claim
19 words
An inpulse noise limiter circuit as claimed in claim 1, wherein said delay circuit comprises a low pass filter.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-05-20 | 1983-11-19 | 1984-05-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-05-20 | 1987-11-19 | 1988-05-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-05-20 | 1991-11-19 | 1992-05-20 | $7700.00 | Window Closed / Lapsed |