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US4571506A Expired / Lapsed US ⏱️ 0.0 years remaining

LED Driver Circuit

Assignee: Nokia Bell Labs
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Filing: 1984-03-28
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Granted: 1986-02-18
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Expires: 2004-03-28
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Abstract

Abstract A driver circuit turns an LED `on` and `off` in response to input logic `one` and `zero` data signals. A current regulator 11 is series coupled with the LED and serves to maintain a constant current to the LED over time, temperature, and supply voltage variations. During turn-off, this current is shunted away from the LED by a low impedance emitter follower (Q3), operated in the active non-saturated region, and a small reverse bias potential is momentarily applied to the LED which quickly sweeps out the charge stored in the LED junction. At the end of the `off` cycle there is a forward prebias potential across the LED. During turn-on, the current shunt is reverse biased and a current peaking circuit (14) provides a momentary additional current through the LED. This instantaneous forward current peaking and the forward prebias both serve to substantially reduce the turn-on delay and rise time of the optical drive signal. The current peaking and current shunting circuits are driven from the same differential amplifier (Q1 and Q2).

Inventors

  • 👤 Richard J. Lisco

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 07:54
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H04; H04B; H04B10/00; H04B10/50; H04B10/501; H04B10/502; H03K17/04; H03K17/041; H03K17/0412; H03K17/04126; H03K17/78; H04B10/564

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 117 words
A driver circuit for turning an LED on and off in response to input logic one and zero data signals comprising a current regulator series coupled with the LED for maintaining a constant current to the LED, means responsive to an input logic "zero" signal for shunting said current away from the LED and applying for a short time interval a peak reverse bias to the LED, and means responsive to an input logic one signal for removing the current shunt and applying for a short time interval a peak forward current to the LED, said current shunting means providing a forward prebias potential to the LED at the end of the first recited short time interval.
Claim 2
Dependent Claim 117 words
A driver circuit for turning an LED on and off in response to input logic one and zero data signals comprising a current regulator series coupled with the LED for maintaining a constant current to the LED, means responsive to an input logic "zero" signal for shunting said current away from the LED and applying for a short time interval a peak reverse bias to the LED, and means responsive to an input logic one signal for removing the current shunt and applying for a short time interval a peak forward current to the LED, said current shunting means providing a forward prebias potential to the LED at the end of the first recited short time interval.
Claim 3
Dependent Claim 22 words
A driver circuit as defined in claim 1 wherein said short time intervals are less than the period of the data signals.
Claim 4
Dependent Claim 30 words
A driver circuit as defined in claim 2 wherein the current shunting means and the current peaking means are operative in response to complementary output signals from a differential amplifier.
Claim 5
Dependent Claim 25 words
A driver circuit as defined in claim 3 wherein the current shunting means comprises a low impedance emitter follower operated in the active non-saturated region.
Claim 6
Dependent Claim 23 words
A driver circuit as defined in claim 4 wherein the emitter of said emitter follower is connected to the cathode of the LED.
Claim 7
Dependent Claim 19 words
A driver circuit as defined in claim 3 wherein the current peaking means comprises a common emitter transistor amplifier.
Claim 8
Dependent Claim 24 words
A driver circuit as defined in claim 6 wherein the collector of said common emitter transistor is connected to the cathode of the LED.

References Cited (Backward Citations)

US3968399A Cited
US4485311A Cited
US4425515A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-02-17 1989-08-19 1990-02-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-02-17 1993-08-19 1994-02-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-02-17 1997-08-19 1998-02-18 $7700.00 Window Closed / Lapsed

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