US4425515A
Expired / Lapsed
US
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Method and means to minimize risetime of a microwave pulse modulated signal from a frequency multiplier circuit
Assignee: Agilent Technologies Inc
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Filing: 1981-11-16
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Granted: 1984-01-10
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Expires: 2001-11-16
Abstract
Abstract A method is provided which minimizes the risetime of a pulse modulated microwave signal propagated through a frequency multiplier circuit which has an input blocking capacitor. The circuit is conditioned by injecting a pulse which charges the blocking capacitor to its steady state value. When a subsequent pulse modulated microwave signal is sent through the frequency multiplier circuit, there is no delay in risetime associated with charging the blocking capacitor of the frequency multiplier circuit.
Inventors
- 👤 Ronald K. Larson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 09:07
CPC Classifications
H; H03; H03B; H03B19/00; H03B19/16; H03B19/20
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
66 words
A method of minimizing the risetime of a pulse modulated microwave output signal from a frequency multiplier circuit having a capacitance, wherein the risetime is degraded by a delay associated with charging the capacitance to a steady state voltage, comprising the steps of: injecting a select pulse into the frequency multiplier circuit; and precharging the capacitance to the steady state voltage with the injected select pulse.
Claim 2
Independent Claim
66 words
A method of minimizing the risetime of a pulse modulated microwave output signal from a frequency multiplier circuit having a capacitance, wherein the risetime is degraded by a delay associated with charging the capacitance to a steady state voltage, comprising the steps of: injecting a select pulse into the frequency multiplier circuit; and precharging the capacitance to the steady state voltage with the injected select pulse.
Claim 3
Dependent Claim
75 words
The method as in claim 1 further comprising the steps of: passing a preliminary microwave signal through the frequency multiplier circuit; measuring a reference voltage from the preliminary microwave signal through the frequency multiplier circuit; determining from the measured reference voltage the pulse characteristics to charge the capacitance to the steady state voltage; and generating the select pulse to have the determined pulse characteristics for the step of injecting the select pulse into the circuit.
Claim 4
Independent Claim
66 words
An apparatus for frequency multiplying a pulse modulated signal comprising: multiplying means for frequency multiplying the modulated signal; capacitive means coupled to the multiplying means for blocking any D.C. component of the modulated signal; and pulse injection means coupled to the capacitive means for injecting a pulse into the capacitive means, thereby precharging the capacitive means to minimize the output risetime of the frequency multiplied signal.
Claim 5
Independent Claim
66 words
An apparatus for frequency multiplying a pulse modulated signal comprising: multiplying means for frequency multiplying the modulated signal; capacitive means coupled to the multiplying means for blocking any D.C. component of the modulated signal; and pulse injection means coupled to the capacitive means for injecting a pulse into the capacitive means, thereby precharging the capacitive means to minimize the output risetime of the frequency multiplied signal.
Claim 6
Dependent Claim
13 words
The apparatus as in claim 3 wherein the capacitive means includes a capacitor.
Claim 7
Dependent Claim
15 words
The apparatus as in claim 4 wherein the multiplying means includes a YIG-tuned frequency multiplier.
Claim 8
Dependent Claim
69 words
The apparatus as in claim 5 wherein the pulse injection means includes: first means coupled to the capacitive means for calculating pulse characteristics of the pulse for reaching a steady state voltage of the capacitive means; and second means coupled to the first means and to the capacitive means for providing a pulse with the calculated pulse characteristics for injection into the capacitive means, thereby charging the capacitive means.
Claim 9
Independent Claim
91 words
An apparatus for minimizing the output risetime of a signal passing through a circuit having a capacitance, where the risetime is degraded by a delay associated with charging the capacitance to a steady state voltage, comprising: first means coupled to the circuit for calculating pulse characteristics to charge the capacitance to a steady state voltage; and pulse injection means, coupled to the first means and to the circuit, for providing a pulse with the calculated pulse characteristics for injection into the circuit, thereby charging the capacitance to the steady state voltage.
Claim 10
Independent Claim
91 words
An apparatus for minimizing the output risetime of a signal passing through a circuit having a capacitance, where the risetime is degraded by a delay associated with charging the capacitance to a steady state voltage, comprising: first means coupled to the circuit for calculating pulse characteristics to charge the capacitance to a steady state voltage; and pulse injection means, coupled to the first means and to the circuit, for providing a pulse with the calculated pulse characteristics for injection into the circuit, thereby charging the capacitance to the steady state voltage.
Claim 11
Dependent Claim
71 words
The apparatus as in claim 7 wherein the first means includes: second means coupled to the pulse injection means for providing a stored voltage to the pulse injection means; voltage comparing means, coupled to the circuit and to the second means, for comparing a reference voltage in the circuit with the stored voltage; and third means, coupled to the second means and the voltage comparing means, for modifying the stored voltage.
Claim 12
Dependent Claim
22 words
The apparatus as in claim 8 wherein the second means is a digital-to-analog converting register and the third means is a microprocessor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-01-09 | 1987-07-11 | 1988-01-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-01-09 | 1991-07-11 | 1992-01-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-01-09 | 1995-07-11 | 1996-01-10 | $7700.00 | Window Closed / Lapsed |