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US4570129A Expired / Lapsed US ⏱️ 0.0 years remaining

High power high voltage linear amplifier apparatus

Assignee: United States Department of the Air Force
•
Filing: 1984-03-07
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Granted: 1986-02-11
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Expires: 2004-03-07
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Abstract

Abstract A high power, high voltage linear field effect transistor amplifier apparatus utilizing an automatic gate biasing network to normalize the gate threshold voltages of a plurality of field effect transistors which are in either series or parallel. Thus, these series or parallel combinations of field effect transistors may be operated as linear devices. A high-voltage, high power, wide-band carrier controlled linear amplifier is provided by utilizing an oscillator as a driver.

Inventors

  • 👤 Walter E. Milberger

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 16:43
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/42; H03F3/423; H03F1/00; H03F1/32; H03F1/3205

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 141 words
A high power, high voltage linear field effect transistor amplifier apparatus comprising in combination: a plurality of field effect transistors connected in series between a +B voltage source and ground, the drain of the first field effect transistor connected to said +B voltage source, the source of the last field effect transistor connected to ground, a diode pair connected respectively between the source and the drain of adjacent series field effect transistors of said plurality of field effect transistors, a gate biasing network connected respectively between the gate and source of each field effect transistor of said plurality of field effect transistors, said gate biasing network maintaining the gate threshold voltage of each field effect transistor, and, an input signal source connected respectively to between the gate and source of each field effect transistor of said plurality of field effect transistors.
Claim 2
Dependent Claim 141 words
A high power, high voltage linear field effect transistor amplifier apparatus comprising in combination: a plurality of field effect transistors connected in series between a +B voltage source and ground, the drain of the first field effect transistor connected to said +B voltage source, the source of the last field effect transistor connected to ground, a diode pair connected respectively between the source and the drain of adjacent series field effect transistors of said plurality of field effect transistors, a gate biasing network connected respectively between the gate and source of each field effect transistor of said plurality of field effect transistors, said gate biasing network maintaining the gate threshold voltage of each field effect transistor, and, an input signal source connected respectively to between the gate and source of each field effect transistor of said plurality of field effect transistors.
Claim 3
Dependent Claim 52 words
A high power, high voltage linear field effect transistor amplifier apparatus as described in claim 1 further including a storing means to store a quiescent bias level, said storing means connected respectively between said input signal source and said source of each field effect transistor of said plurality of field effect transistors.
Claim 4
Dependent Claim 75 words
A high power, high voltage linear field effect transistor amplifier apparatus as described in claim 2 further including an oscillator means to provide a predetermined frequency signal, and a control amplifier means to receive said predetermined frequency signal, said control amplifier means isolating said oscillator means from said gates of said plurality of field effect transistors, said control amplifier means applying said predetermined frequency signal to said gates of said plurality of field effect transistors.
Claim 5
Dependent Claim 24 words
A high power, high voltage linear field effect transistor amplifier apparatus as described in claim 3 wherein said predetermined frequency signal comprises 50 MHz.
Claim 6
Dependent Claim 86 words
A high power, high voltage linear field effect transistor amplifier apparatus as described in claim 1 wherein said gate biasing network comprises an NPN transistor having an emitter, base and collector, each collector of said biasing network respectively connected by a resistive means to the drain of its corresponding field effect transistor, said base of said biasing network respectively connected to the source of its correponding field effect transistor, said emitter connected between said diode pair and input signal source of its corresponding field effect transistor.

References Cited (Backward Citations)

US2950443A Cited
US3286189A Cited
US3383613A Cited
US3668545A Cited
US3953807A Cited
US3968452A Cited
US3988691A Cited
US3986132A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-02-10 1989-08-12 1990-02-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-02-10 1993-08-12 1994-02-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-02-10 1997-08-12 1998-02-11 $7700.00 Window Closed / Lapsed

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