Method of manufacturing transistors

Claim 1

A method of manufacturing a high frequency bipolar transistor comprising the steps of providing a first insulating layer on a surface of a collector region of a first conductivity type, forming at least one aperture in said first insulating layer, introducing dopant of a second conductivity type into said surface through said aperture in said first insulating layer to form a base region of said second conductivity type, providing a second insulating layer at least on said base region, forming a plurality of windows in said second insulating layer, introducing dopant of said first conductivity type into said plurality of windows to form a plurality of emitter regions embedded into said base region, providing a masking layer onto said second insulating layer and said plurality of emitter regions, forming a second plurality of windows in said masking layer above said base region and exclusive of said emitter windows, etching said second insulating layer at said second plurality of windows in said masking layer, introducing dopant of said second conductivity type through said second plurality of windows to form a plurality of base contact zones in said base region, said base contact zones being more highly doped than said base region, removing said masking layer, and forming a plurality of emitter contacts contacting said plurality of emitter regions and a plurality of base contacts contacting said plurality of base contact zones through said first plurality of windows and said second plurality of windows respectively.

Claim 2

A method of manufacturing a high frequency bipolar transistor comprising the steps of providing a first insulating layer on a surface of a collector region of a first conductivity type, forming at least one aperture in said first insulating layer, introducing dopant of a second conductivity type into said surface through said aperture in said first insulating layer to form a base region of said second conductivity type, providing a second insulating layer at least on said base region, forming a plurality of windows in said second insulating layer, introducing dopant of said first conductivity type into said plurality of windows to form a plurality of emitter regions embedded into said base region, providing a masking layer onto said second insulating layer and said plurality of emitter regions, forming a second plurality of windows in said masking layer above said base region and exclusive of said emitter windows, etching said second insulating layer at said second plurality of windows in said masking layer, introducing dopant of said second conductivity type through said second plurality of windows to form a plurality of base contact zones in said base region, said base contact zones being more highly doped than said base region, removing said masking layer, and forming a plurality of emitter contacts contacting said plurality of emitter regions and a plurality of base contacts contacting said plurality of base contact zones through said first plurality of windows and said second plurality of windows respectively.