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US4555591A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated circuit devices for secure data encryption

Assignee: Nokia Bell Labs
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Filing: 1982-09-07
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Granted: 1985-11-26
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Expires: 2002-09-07
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Abstract

Abstract The present invention relates to apparatus for placing digital words or a private key into a register in an integrated circuit in such a manner that it cannot be later read or modified from outside the integrated circuit for purposes of, for example, providing a secure communication system. More particularly, a special key register in the form of an externally programmable read-only-memory which is programmable from external to the integrated circuit is provided. The programmable register contains at least one extra bit which is not part of the private key for enabling the program line through a gating means and entering the private key into the appropriate locations in the register before a predetermined binary code is placed in the at least one extra bit location which disables the gating means and thereafter prevents the changing of the private key in the register.

Inventors

  • 👤 Randy D. Nash

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 00:29
CPC Classifications
H; H04; H04L; H04L9/00; H04L9/06; H04L9/08; H04L9/0894

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 129 words
An integrated device comprising: an externally programmable read-only-memory register including a plurality of M+N storage locations capable of separately storing both an M-bit unique binary key word and an N-bit enable code word which is used for programming the register, the M+N bits initially including a first binary value; and gating means responsive to the first binary value of the N-bit enable code word initially stored in the N storage locations of the register to enable the register and permit the writing of a uniquely encoded binary key word into the M storage locations of the register followed by an N-bit enable code word including a predetermined second binary value which is capable of both disabling the gating means and preventing the subsequent changing of the M+N bit values.
Claim 2
Dependent Claim 129 words
An integrated device comprising: an externally programmable read-only-memory register including a plurality of M+N storage locations capable of separately storing both an M-bit unique binary key word and an N-bit enable code word which is used for programming the register, the M+N bits initially including a first binary value; and gating means responsive to the first binary value of the N-bit enable code word initially stored in the N storage locations of the register to enable the register and permit the writing of a uniquely encoded binary key word into the M storage locations of the register followed by an N-bit enable code word including a predetermined second binary value which is capable of both disabling the gating means and preventing the subsequent changing of the M+N bit values.
Claim 3
Dependent Claim 82 words
An integrated device according to claim 1 wherein the device further comprises: a communications device which is connected to the M storage locations of the register and comprises an input and an output data port, the communications device being capable of transmitting data between the input and the output data port in response to an M-bit binary key word being provided to the communications device from outside the integrated device which corresponds to the M-bit binary key word stored in the register.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-11-25 1989-05-27 1989-11-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-11-25 1993-05-27 1993-11-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-11-25 1997-05-27 1997-11-26 $7700.00 Window Closed / Lapsed

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