Carrier detection circuit

Claim 2

A carrier detection circuit for determining the presence of a carrier signal on an input lead comprising: means for rectifying the signal on said input lead and providing a rectified signal; integration means for integrating said rectified signal and providing an integrated signal; a comparator for comparing said integrated signal with a reference signal, said comparator producing a comparator output signal whenever the amplitude of said integrated signal equals or exceeds the amplitude of said reference signal; and timing means for receiving of said comparator output signal and determining the length of time that a comparator output signal has been received and for providing an output signal indicating when a carrier signal has been detected for a time greater than a selected length of time.

Claim 3

A carrier detection circuit for determining the presence of a carrier signal, in accordance with claim 1 wherein said means for rectifying includes at least one gain stage for amplifying said rectified signal.

Claim 4

A carrier detection circuit in accordance with claim 2 wherein said at least one gain stage includes a switcned capacitor gain stage.

Claim 5

A carrier detection circuit for determining the presence of a carrier signal in accordance with claim 3 wherein said switched capacitor gain stage has multiple capacitors which may be selectively switched to set the gain, said gain being either positive or negative as desired.

Claim 6

A carrier detection circuit for determining the presence of a carrier signal in accordance with claim 1 wherein said comparator includes hysteresis means for holding said comparator output signal in a particular digital state unless said integrated signal deviates by a set amount.

Claim 7

A carrier detection circuit in accordance with claim 5 wherein said hysteresis means comprises means to adjust the level of said reference signal once a particular digital output state has been attained.

Claim 8

A carrier detection circuit for determining the presence of a carrier signal in accordance with claim 1 wherein said timing means comprises a digital counter.

Claim 9

A carrier detection circuit in accordance with claim 1 in combination with a mark detect circuit for detecting the presence of a mark in said carrier signal, the output of said mark detect circuit being introduced to said timing means and said timing means providing an output signal indicating when a carrier signal has been detected for a time greater than a first selected length of time and a mark has been detected for a time greater than a second selected length of time.

Claim 10

A carrier signal detection circuit in accordance with claim 1 in which said means for rectifying said carrier signal on said input lead comprises: an input lead for receiving said carrier signal; amplifier means having an inverting input lead and an output lead; a first capacitor having a first plate connected to said output lead of said amplifier means and a second plate connected to said inverting input lead of said amplifier means; a second capacitor having a first plate connected to said inverting input lead of said amplifier means, and having a second plate; first switch means connected between said output lead of said amplifier means and said inverting input lead of said amplifier means; second switch means connected between said input lead and said second plate of said second capacitor; third switch means connected between said second plate of said second capacitor and a reference voltage lead; and means for controlling said first, second and third switch means wherein, when said input signal is more negative than said reference voltage, during a first time period said first and second switch means are closed and said third switch means is open, and during a second time period said first and second switch means are open and said third switch means is closed, thereby providing an output signal on said output lead which is equal to -αV in , where α is the gain of said amplifier means and V in is the voltage of said carrier signal, and wherein when said carrier signal is more positive than said reference voltage, during a first time period said second switch means is open and said first and third switch means are closed, and during a second time period said second switch means is closed and said first and third switch means are open, thereby providing an output signal on said output lead which is equal to +αV in .

Claim 11

The structure as in claim 9 which further comprises additional capacitors which can be selectively connected to select the gain of said amplifier means.

Claim 12

A carrier detection circuit in accordance with claim 1 in which said comparator for comparing said integrated signal with a reference signal comprises: an operational amplifier having an inverting input lead serving as the input lead of said comparator for receiving said integrated signal, a noninverting input lead, and an output lead serving as the output lead of said comparator; and means for applying a selected voltage to said noninverting input lead of said operational amplifier, said selected voltage having a first polarity when said integrated signal is positive and said selected voltage having a second polarity opposite said first polarity when said integrated signal is negative.

Claim 13

An automatic gain control circuit comprising: means for providing a plurality of reference voltages; means for determining the presence and level of a carrier signal by sequentially comparing said carrier signal with said plurality of reference voltages; and means for amplifying said carrier signal, said means for amplifying providing a gain which is selected to provide an amplified carrier signal of a desired level.

Claim 14

An automatic gain control circuit comprising: means for providing a plurality of reference voltages; means for determining the presence and level of a carrier signal by sequentially comparing said carrier signal with said plurality of reference voltages; and means for amplifying said carrier signal, said means for amplifying providing a gain which is selected to provide an amplified carrier signal of a desired level.