Carrier detection circuit

Claim 2

In a frequency shift keying modem with a receiver having a signal equalizer and a zero crossing detector, a carrier detection circuit comprising: a trigger circuit; first carrier detection means connected to said trigger circuit turning said trigger circuit on in response to a mark frequency signal; and second carrier detection means connected to said trigger circuit keeping said trigger circuit on in response to the presence of carrier frequency signals.

Claim 3

The carrier detection circuit of claim 1 wherein: said first carrier detection means includes a first phase lock circuit in circuit with said equalizer and effective to provide an output voltage in response to a mark carrier frequency.

Claim 4

The carrier detection circuit of claim 2 wherein: said second carrier detection means includes a second phase lock circuit in circuit with said zero crossing detEctor effective to provide a mark output voltage rectangular wave from said zero crossing detector; and a third phase lock circuit in circuit with said zero crossing detector effective to provide a space output voltage in rectangular wave from said zero crossing detector.

Claim 5

The carrier detection circuit of claim 3 wherein first low pass filter means is connected in circuit with said first phase lock circuit effective to provide a first direct voltage in response to a mark frequency carrier.

Claim 6

The carrier detection circuit of claim 4 wherein second low pass filter means is connected in circuit with said second and third phase lock circuits effective to provide a second direct voltage in response to said space and mark frequency rectangular waves.

Claim 7

The carrier detection circuit of claim 5 wherein said first and second low pass filter means are connected to said trigger circuit whereby said trigger circuit is turned on by an output voltage from said first low pass filter means and kept on by an output voltage from said second low pass filter means.

Claim 8

The carrier detection circuit of claim 6 wherein said first phase lock circuit includes a first voltage controlled oscillator having a normal frequency of oscillation lower than the mark signal frequency, a first phase comparator connected to said signal equalizer and to said first voltage controlled oscillator to generate a first difference voltage, and means for applying said first difference voltage to said first voltage controlled oscillator to synchronize with said mark frequency signal by increasing frequency of said first voltage controlled oscillator.

Claim 9

The carrier detection circuit of claim 7 wherein said second phase lock circuit includes a second voltage controlled oscillator having a normal frequency of oscillation lower than the space signal frequency, a second phase comparator connected to said zero crossing detector and to said second voltage controlled oscillator to generate a second difference voltage, and means for applying said second difference voltage to said second voltage controlled oscillator to synchronize with said space frequency signal by increasing frequency of said second voltage controlled oscillator.

Claim 10

The carrier detection circuit of claim 8 wherein said third phase lock circuit includes a third voltage controlled oscillator having a normal frequency of oscillation higher than the mark signal frequency, a third phase comparator connected to said zero crossing detector and to said third voltage controlled oscillator to generate a difference voltage, and means for applying said difference voltage to said third voltage controlled oscillator to synchronize with said mark frequency signal by decreasing frequency of said third voltage controlled oscillator.

Claim 11

In a frequency shift keying modem with a receiver having a signal equalizer and a zero crossing detector, a carrier detection circuit comprising: a first phase lock circuit in circuit with said equalizer tuned to provide an output voltage upon receipt of a mark frequency carrier signal; and second and third phase lock circuits in circuit with said zero crossing detector, said second phase lock circuit tuned to provide a second output voltage upon occurrence of a space carrier and said third phase lock circuit tuned to provide a third output signal upon occurrence of a mark carrier; combining means connected to said second and third phase lock circuits for combining said second and third output signals to provide an output voltage; a Schmitt trigger circuit connected in circuit with said means and said first phase lock circuit to provide a carrier detect voltage upon receipt of a carrier signal.

Claim 12

In a frequency shift keying modem with a receiver having a signal equalizer and a zero crossing detector, a carrier detection circuit comprising: a first phase lock circuit in circuit with said equalizer tuned to provide an output voltage upon receipt of a mark frequency carrier signal; and second and third phase lock circuits in circuit with said zero crossing detector, said second phase lock circuit tuned to provide a second output voltage upon occurrence of a space carrier and said third phase lock circuit tuned to provide a third output signal upon occurrence of a mark carrier; combining means connected to said second and third phase lock circuits for combining said second and third output signals to provide an output voltage; a Schmitt trigger circuit connected in circuit with said means and said first phase lock circuit to provide a carrier detect voltage upon receipt of a carrier signal.

Claim 13

In the carrier detection circuit of claim 10, threshold comparator means in circuit with said first phase lock circuit enabling said Schmitt trigger circuit to be turned on by the output voltage from said first phase lock circuit and kept on by the output voltage from said combining means.