Time slot interchanger

Claim 2

A time division (TD) communication switching system for controllably establishing call connections between selected ports via a time slot interchanger (TSI) wherein said TSI comprises: an input data store for receiving call data from the ones of said ports currently serving calls, an output data store for applying call data to the ones of said ports currently serving calls, a plurality of TSI processors, means effective on a call for extending call data from said input data store to a selected one of said TSI processors, means in said selected TSI processor for processing said extended call data by performing specified logic operations on said call data, means in said selected TSI processor for applying said processed data for said call to said output data store, and means in another one of said TSI processors for concurrently serving another call between other ones of said ports by receiving data for said other call from said input store, by processing said data, and by extending said processed data to said output store.

Claim 3

The system of claim 1 wherein said input store and said output store each comprising a plurality of stores each of which is associated with a different plurality of said ports.

Claim 4

A time division (TD) communication switching system for controllably establishing call connections between selected ports via a time slot interchanger (TSI) wherein said TSI comprises: input data stores for receiving call data from the ones of said ports currently serving calls, output data stores for applying call data to the ones of said ports currently serving calls, a plurality of TSI processors, means effective on a call for extending call data from the input data store serving a first port involved on said call to a selected one of said TSI processors, means in said selected TSI processor for processing said extended call data by performing specified logic operations on said call data, means in said selected TSI processor for applying said processed data for said call to an output data store serving a second port involved on said call, and means in another one of said TSI processors for concurrently serving another call between two other ones of said ports by receiving data extended for said other call from said input store serving a first port involved on said other call, by processing said data, and by applying said processed data to an output store serving a second port involved on said other call.

Claim 5

A time division (TD) communication switching system for controllably establishing call connections between selected ports via a time slot interchanger (TSI) wherein said TSI comprises: input data stores for receiving call data from the ones of said ports currently serving calls, output data stores for applying call data to the ones of said ports currently serving calls, a plurality of TSI processors, means effective on a call for extending call data from the input data store serving a first port involved on said call to a selected one of said TSI processors, means in said selected TSI processor for processing said extended call data by performing specified logic operations on said call data, means in said selected TSI processor for applying said processed data for said call to an output data store serving a second port involved on said call, and means in another one of said TSI processors for concurrently serving another call between two other ones of said ports by receiving data extended for said other call from said input store serving a first port involved on said other call, by processing said data, and by applying said processed data to an output store serving a second port involved on said other call.

Claim 6

The system of claim 3 wherein said input and output stores each comprise a memory having an addressable location individual to each of said ports, said means for extending comprising; means for applying address signals over a first common path from said processors to said input store in distinct time periods, and means for applying call data read out of said stores over a second common path to said processors in separate time periods.

Claim 7

The system of claim 4 wherein said means for applying data to said output stores comprises: means for applying address signals over a third common path from said processors to said output stores in distinct time periods, and means for applying call data from said processors in separate time periods over a fourth common path to said output stores for entry into the memory location specified by said address signals on said third path.

Claim 8

The system of claim 5 wherein said plurality of TSI processors time share access to said input and output stores to receive data from said input stores and to apply data to said output stores in distinct time periods.

Claim 9

The system of claim 6 in combination with: means for applying control information to each TSI processor specifying the logic operation to be performed on the received data for each call, and means in each processor responsive to the receipt of said control information for performing said specified logic operation.

Claim 10

The system of claim 7 wherein said TSI processors are of different types for serving different types of calls, said system further comprising: means for identifying the type of call served by each calling port, and means for assigning each call to a TSI processor of the type equipped to serve said call.

Claim 11

A time division (TD) communication switching system for controllably establishing call connections between selected ports via a time slot interchanger (TSI) wherein said TSI comprises: an input data store for receiving call data from the ones of said ports currently serving calls, an output data store for applying call data to the ones of said ports currently serving calls, a plurality of TSI processors each equipped to serve different types of calls, means responsive to the initiation of each call for determining the call type, means responsive to said determination for assigning each call to a TSI processor of the type equipped to serve said call, means effective on a call for extending data for said call from said input data store to said assigned TSI processor, means in said assigned TSI processor for processing said extended call data by performing specified logic operations on said call data, and means in said assigned TSI processor for applying said processed data for said call to said output data store.

Claim 12

A time division (TD) communication switching system for controllably establishing call connections between selected ports via a time slot interchanger (TSI) wherein said TSI comprises: an input data store for receiving call data from the ones of said ports currently serving calls, an output data store for applying call data to the ones of said ports currently serving calls, a plurality of TSI processors each equipped to serve different types of calls, means responsive to the initiation of each call for determining the call type, means responsive to said determination for assigning each call to a TSI processor of the type equipped to serve said call, means effective on a call for extending data for said call from said input data store to said assigned TSI processor, means in said assigned TSI processor for processing said extended call data by performing specified logic operations on said call data, and means in said assigned TSI processor for applying said processed data for said call to said output data store.

Claim 13

The system of claim 9 wherein said input store and said output store each comprising a plurality of stores each of which is associated with a different plurality of said ports.

Claim 14

The system of claim 9 wherein said plurality of TSI processors time share access to said input and output stores to receive data from said input store and to apply data to said output store in distinct time periods.

Claim 15

The system of claim 11 in combination with: means for applying control information to each TSI processor specifying the logic operation to be performed on the received data for each call, and means in each processor responsive to the receipt of said control information for performing said specified logic operation.

Claim 16

In a time division (TD) communication switching system for controllably establishing call connections between selected ports via a time slot interchanger (TSI), means for defining a cyclically reoccurring series of time slots, means for assigning each call served by said system to a time slot in said series, said TSI comprising: means for defining a cyclically reoccurring series of TSI introduction intervals each having a plurality of phases, input data stores for receiving call data from the ones of said ports currently serving calls, output data stores for applying call data to the ones of said ports currently serving calls, a plurality of TSI processors, means for assigning each TSI processor to a unique phase of each instruction interval, means effective on a first call for extending data pertaining to said call from one of said input data stores to a first selected one of said TSI processors during a first phase of an instruction interval assigned to said selected processor, means effective on a second call for extending data pertaining to said second call from said input stores to another TSI processor during a second phase of the same instruction interval assigned to said first selected TSI processor, means in said TSI processors for concurrently processing said extended call data by performing specified logic operations on said data, and means in each TSI processor for applying said processed call data for each call served by said processor to an output data store during first and second phases of an instruction interval.

Claim 17

In a time division (TD) communication switching system for controllably establishing call connections between selected ports via a time slot interchanger (TSI), means for defining a cyclically reoccurring series of time slots, means for assigning each call served by said system to a time slot in said series, said TSI comprising: means for defining a cyclically reoccurring series of TSI introduction intervals each having a plurality of phases, input data stores for receiving call data from the ones of said ports currently serving calls, output data stores for applying call data to the ones of said ports currently serving calls, a plurality of TSI processors, means for assigning each TSI processor to a unique phase of each instruction interval, means effective on a first call for extending data pertaining to said call from one of said input data stores to a first selected one of said TSI processors during a first phase of an instruction interval assigned to said selected processor, means effective on a second call for extending data pertaining to said second call from said input stores to another TSI processor during a second phase of the same instruction interval assigned to said first selected TSI processor, means in said TSI processors for concurrently processing said extended call data by performing specified logic operations on said data, and means in each TSI processor for applying said processed call data for each call served by said processor to an output data store during first and second phases of an instruction interval.

Claim 18

The system of claim 13 wherein said input stores and said output stores each comprises a single store.

Claim 19

The system of claim 13 wherein said input and output stores each comprise a memory having an addressable location individual to each of said ports, said means for extending comprising; means for applying address signals over a first common path from said processors to said input store in distinct time periods, and means for applying call data read out of said stores over a second common path to said processor in separate time periods.

Claim 20

The system of claim 15 wherein said plurality of TSI processors time share access to said input and output stores to receive data from said input stores and to apply data to said output stores in distinct time periods.

Claim 21

The system of claim 13 in combination with: means for applying control information to each TSI processor specifying the logic operation to be performed on the received data for each call, and means in each processor responsive to the receipt of said control information for performing said specified logic operation.

Claim 22

The system of claim 13 wherein said TSI processors are of different types for serving different types of calls, said system further comprising: means for identifying the type of call served by each calling port, and means for assigning each call to a TSI processor of the type equipped to serve said call.

Claim 23

In a time division (TD) communication switching system for controllably establishing call connections between ports via a time slot interchanger (TSI), means for defining a series of cyclically reoccurring time slots, means for assigning each call served by said system to a time slot, means for defining a series of cyclically reoccurring instruction intervals each having a plurality of phases, a TSI comprising input data stores for receiving call data from call serving ports, output data stores for applying call data to call serving ports, and transfer means for extending call data from said input data stores to said output data stores, said transfer means comprising; a plurality of TSI processors, means for assigning each processor to a unique one of said phases in each interval, means for selecting the processor to be used on each transfer of data for a call from an input store to an output store, means for applying data for a first call to a first one of said TSI processors during a first phase of an interval, means for applying call data for a second call to another one of said TSI processor during a second phase of said interval, means in said first and second TSI processor for concurrently processing said received data, and means in each processor for transferring said data from said input store to said output store during separate phases of one of said intervals.

Claim 24

In a time division (TD) communication switching system for controllably establishing call connections between ports via a time slot interchanger (TSI), means for defining a series of cyclically reoccurring time slots, means for assigning each call served by said system to a time slot, means for defining a series of cyclically reoccurring instruction intervals each having a plurality of phases, a TSI comprising input data stores for receiving call data from call serving ports, output data stores for applying call data to call serving ports, and transfer means for extending call data from said input data stores to said output data stores, said transfer means comprising; a plurality of TSI processors, means for assigning each processor to a unique one of said phases in each interval, means for selecting the processor to be used on each transfer of data for a call from an input store to an output store, means for applying data for a first call to a first one of said TSI processors during a first phase of an interval, means for applying call data for a second call to another one of said TSI processor during a second phase of said interval, means in said first and second TSI processor for concurrently processing said received data, and means in each processor for transferring said data from said input store to said output store during separate phases of one of said intervals.

Claim 25

The time slot interchanger (TSI) of claim 19 wherein each processor includes; means for specifying the logic operations to be performed on each data transfer, means for processing said data to effect said specified logic operations, and means for applying said processed data to said output store.

Claim 26

The system of claim 20 wherein each of said TSI processors are equipped to serve different types of calls, said system further comprising: means for identifying the type of call initiated by each calling port, and means for assigning each call to a TSI processor equipped to serve said call.

Claim 27

The system of claim 21 wherein said input and output stores each comprise a memory having an addressable location individual to each of said ports, said means for extending comprising; means for applying address signals over a first common path from said processors to said input store in distinct time periods, and means for applying call data read out of said stores over a second common path to said processors in separate time periods.

Claim 28

A time slot interchanger (TSI) comprising: input data stores, output data stores, means for defining a cyclically reoccurring series of time slots, means for defining a cyclically reoccurring series of instruction intervals, transfer means for extending data information from said input data stores to said output data stores, said transfer means comprising; a plurality of TSI processors, means for assigning each TSI processor to a unique phase of each interval, means effective for selecting the processor to be used on each transfer of data between said input and output stores, means for transferring data from said input store to different ones of said processors during a single interval by effecting each transfer to a processor during the phase unique to each processor, means in each processor for processing said data concurrently with said other processors, and means for applying said processed data from said processor to said output stores in separate phases of one of said intervals.

Claim 29

A time slot interchanger (TSI) comprising: input data stores, output data stores, means for defining a cyclically reoccurring series of time slots, means for defining a cyclically reoccurring series of instruction intervals, transfer means for extending data information from said input data stores to said output data stores, said transfer means comprising; a plurality of TSI processors, means for assigning each TSI processor to a unique phase of each interval, means effective for selecting the processor to be used on each transfer of data between said input and output stores, means for transferring data from said input store to different ones of said processors during a single interval by effecting each transfer to a processor during the phase unique to each processor, means in each processor for processing said data concurrently with said other processors, and means for applying said processed data from said processor to said output stores in separate phases of one of said intervals.

Claim 32

The method of claim 24 wherein said plurality of TSI processors are operated to time share access to said input and output stores for receiving data from said input store and for applying data to said output store in distinct time periods.

Claim 33

The method of claim 24 in combination with the steps of: (1) applying control information to each TSI processor specifying the logic operation to be performed on the received data for each call, and (2) operating each processor in response to the receipt of said control information to perform said specified logic operation.

Claim 34

The method of claim 24 wherein said TSI processors are of different types for serving different types of calls, said method further comprising the steps of: (1) identifying the type of call served by each calling port, and (2) assigning each call to a TSI processor of the type equipped to serve said call.

Claim 37

The method of claim 28 wherein said plurality of TSI processors are operated to time share access to said input and output stores for receiving data from said input store and for applying data to said output store in distinct time periods.

Claim 38

The method of claim 28 in combination with the steps of: (1) applying control information to each TSI processor specifying the logic operation to be performed on the received data for each call, and (2) operating each processor in response to the receipt of said control information for performing said specified logic operation.

Claim 41

The method of claim 31 in combination with the steps of: (1) applying control information to each TSI processor specifying the logic operation to be performed on the received data for each call, and (2) operating each processor in response to the receipt of said control information to perform said specified logic operation.

Claim 42

The method of claim 32 wherein said TSI processors are of different types for serving different types of calls, said method further comprising the steps of: (1) identifying the type of call served by each calling port, and (2) assigning each call to a TSI processor of the type equipped to serve said call.

Claim 45

The method of claim 34 in combination with the steps of: (1) specifying the logic operations to be performed on each data transfer, (2) processing said data to effect said specified logic operations, and (3) applying said processed data to said output store.

Claim 46

The method of claim 35 wherein each of said TSI processors are equipped to serve different types of calls, said method further comprising the steps of: (1) identifying the type of call initiated by each calling port, and (2) assigning each call to a TSI processor equipped to serve said call.