Pulse code modulated digital automatic exchange

Claim 2

A pulse code modulated digital automatic exchange for a telephone network or like communication network, comprising: an input/output system including: line connection means defining N communication ports; a series of input multiplex conversion means each connected to a plurality of the communication ports and each generating a multiplexed sequence of M-bit parallel digital data signals, each digital data signal being representative of an input signal received at one communication port; a corresponding series of output de-multiplex conversion means, each connected to the plurality of communication ports served by one input conversion means, for converting M-bit parallel digital data signals to output signals and selectively applying those output signals to those communication ports; conversion control means, connected to the input conversion means and the output conversion means, for actuating each input conversion means and its associated output conversion means at a multiplex conversion rate determined by the nature of the input and output signals, in accordance with a multiplex scan cycle of given duration; data storage means, connected to the input conversion means and the output conversion means, including at least N M-bit storage locations, at least one storage location associated with each communication port; and path control means, connected to the conversion control means and the data storage means, for correlating any and all possible combinations of two communication ports for data transfer calls and actuating the data storage means to effect a first series of transfers of parallel M-bit digital data signals from a storage location for one port in a call to a storage location for the other port in that call and a second series of transfers of parallel digital data signals from a storage location for the other port to a storage location for the one port in that call; and a data transfer system including: an M-bit parallel digital data bus, connected to the data storage means, for transferring digital data signals recorded at one location in the data storage means to another location in the data storage means; and sequence control means, connected to the path control means, for actuating the path control means in accordance with a transfer cycle of sequential transfer time slots, one time slot assigned to each communication port, with one of the series of data transfers occurring in the time slots assigned to the calling port in a call and the other series of data transfers occurring in the time slots assigned to the called port in that call; the duration of the complete transfer cycle, encompassing all N ports, being no greater than the duration of the multiplex scan cycle.

Claim 3

A pulse code modulated digital automatic exchange according to claim 1 in which the period for each transfer time slot is substantially less than one microsecond.

Claim 4

A pulse code modulated digital automatic exchange according to claim 2 in which the duration of the multiplex scan cycle is equal to the duration of the complete transfer cycle.

Claim 5

A pulse code modulated digital automatic exchange according to claim 3 in which: each input conversion means includes a multiplexer connecting a plurality of communication ports to an analog to digital converter; and each output conversion means includes a digital to analog converter connected to a de-multiplexer in turn connected to the same ports as the multiplexer.

Claim 6

A pulse code modulated digital automatic exchange according to claim 1, or claim 2, or claim 3, or claim 4, in which the data storage means comprises a plurality of data stores, each connected to a limited number of input conversion means and associated output conversion means, all of the data stores being interconnected by the digital data bus.

Claim 7

A pulse code modulated digital automatic exchange according to claim 5 in which each data store comprises an input data storage unit and an output data storage unit, each having an M-bit storage location for each port served by the associated input and output conversion means, and in which each data transfer shifts data from an input storage unit to an output storage unit.

Claim 8

A pulse code modulated digital automatic exchange according to claim 1, or claim 2, or claim 3, or claim 4, in which the conversion control means comprises a plurality of conversion control circuits, each connected to and actuating a limited number of input and output conversion means.

Claim 9

A pulse code modulated digital automatic exchange according to claim 7, in which each conversion control circuit is connected to and actuates two input conversion means and two output conversion means, and in which each input conversion means and each output conversion means is connected to eight communication ports.

Claim 10

A pulse code modulated digital automatic exchange according to claim 7 in which: the path control means comprises a plurality of path control circuits, each connected to one conversion control circuit and to the data storage means; and the data transfer system includes a plurality of parallel digital address buses, interconnecting all of the path control circuits and the sequence control means, for transferring time slot address data, identifying the ports involved in individual calls, among the path control circuits.

Claim 11

A pulse code modulated digital automatic exchange according to claim 9 in which the data storage means comprises a plurality of data stores, at least one for each path control circuit, all of the data stores being interconnected by the data bus.

Claim 12

A pulse code modulated digital automatic exchange according to claim 10 in which each data store is of dual construction, comprising an input data store having M inputs connected to the input conversion circuits served by one conversion control circuit, and an output data store having M outputs connected to the output conversion circuits served by the same conversion control circuit, with each input data store adapted to output parallel digital data signals onto the data bus and each output data store adapted to record parallel digital data signals from the data bus.

Claim 13

A pulse code modulated digital automatic exchange according to claim 11 in which each conversion control circuit is connected to and actuates two input conversion means and two output conversion means, and in which each input conversion means and each output conversion means is connected to eight communication ports.

Claim 14

A pulse code modulated digital automatic exchange according to claim 1, or claim 2, or claim 3, or claim 4, in which: the data transfer system includes a multi-bit parallel digital transmit address bus connected to the sequence control means and to the path control means; and the sequence control means includes a transmit address generator, connected to the transmit address bus, for generating a sequence of digital parallel multi-bit transmit addresses, each identifying one specific communication port, and for applying those transmit addresses to the transmit address bus in a continuous cyclically repeating sequence, one address in each time slot, to identify the port to which each time slot is assigned.

Claim 15

A pulse code modulated digital automatic exchange according to claim 13 in which: the path control means comprises receive address storage means for recording transmit addresses as receive addresses in N individual storage locations, one for each communication port; and the path control means further comprises transmit/receive address comparator means for comparing transmit addresses from the transmit address bus with receive addresses recorded in the receive address storage means to correlate any two ports for a data transfer call.

Claim 16

A pulse code modulated digital automatic exchange according to claim 14 in which: the receive address storage means comprises a plurality of receive address stores, each serving a limited number of ports and having a storage location for each port it serves; the data transfer system includes a multi-bit receive address bus interconnecting all of the receive address stores and the transmit/receive address comparator means; and the transmit/receive address comparator means compares receive addresses read out from the locations in the various receive address stores onto the receive address bus under control of the transmit addresses on the transmit address bus.

Claim 17

A pulse code modulated digital automatic exchange according to claim 15 in which the data storage means comprises a plurality of data stores, each connected to a limited number of input conversion means and associated output conversion means, all of the data stores being interconnected by the digital data bus.

Claim 18

A pulse code modulated digital automatic exchange according to claim 16 in which each data store comprises an input data storage unit and an output data storage unit, each having an M-bit storage location for each port served by the associated input and output conversion means, and in which each data transfer shifts data from an input storage unit to an output storage unit.

Claim 19

A pulse code modulated digital automatic exchange according to claim 16 in which the conversion control means comprises a plurality of conversion control circuits, each connected to and actuating a limited number of input and output conversion means.

Claim 20

A pulse code modulated digital automatic exchange according to claim 18, in which each conversion control circuit is connected to and actuates two input conversion means and two output conversion means, and in which each input conversion means and each output conversion means is connected to eight communication ports.

Claim 21

A pulse code modulated digital automatic exchange for a telephone network or like communication network, comprising: an input/output system including: line connection means defining N communication ports; a series of input multiplex conversion means each connected to a plurality of the communication ports and each generating a multiplexed sequence of M-bit parallel digital data signals, each digital data signal being representative of an input signal received at one communication port; a corresponding series of output de-multiplex conversion means, each connected to the plurality of communication ports served by one input conversion means, for converting M-bit parallel digital data signals to output signals and selectively applying those output signals to those communication ports; conversion control means, connected to each communication port and to the input conversion means and the output conversion means, for actuating each input conversion means and its associated output conversion means at a multiplex conversion rate determined by the nature of the input and output signals, in accordance with a multiplex scan cycle of given duration; data storage means, connected to the input conversion means and the output conversion means, including at least N M-bit storage locations, at least one storage location associated with each communication port; and path control means, connected to the conversion control means and the data storage means, for correlating any and all possible combinations of two communication ports for data transfer calls and actuating the data storage means to effect a first series of data transfers of a parallel M-bit digital data signals from a storage location for the one port in a call to a storage location for the other port in that call and a second series of data transfers of M-bit parallel digital data signals from a storage location for the other port to a storage location for the one port in that call; and a data transfer system including: an M-bit parallel digital data bus, connected to the data storage means, for transferring digital data signals recorded at one location in the data storage means to another location in the data storage means; a multi-bit parallel digital transmit address bus connected to the path control means; sequence control means, connected to the transmit address bus, for supplying to the transmit address bus a sequence of multi-bit parallel digital transmit addresses in a transfer cycle of given duration comprising at least N transfer time slots, one transmit address and its time slot identifying each communication port; receive address bus means comprising at least one multi-bit parallel digital receive address bus connected to the path control means; and address decoder means connected to the data bus, the transmit address bus, and the receive address bus, for comparing a called port address derived from the data bus with the transmit addresses on the transmit address bus to find a match therebetween identifying the time slot of the called port; the address decoder means further comprising receive address output means to supply a called port address to the receive address bus means when a match is found and thereby enable the path control means to control the data storage means so that one series of data transfers occurs in the transfer time slot of the calling port in each call and the other series of data transfers occurs in the transfer time slot of the called port in that call.

Claim 22

A pulse code modulated digital automatic exchange for a telephone network or like communication network, comprising: an input/output system including: line connection means defining N communication ports; a series of input multiplex conversion means each connected to a plurality of the communication ports and each generating a multiplexed sequence of M-bit parallel digital data signals, each digital data signal being representative of an input signal received at one communication port; a corresponding series of output de-multiplex conversion means, each connected to the plurality of communication ports served by one input conversion means, for converting M-bit parallel digital data signals to output signals and selectively applying those output signals to those communication ports; conversion control means, connected to each communication port and to the input conversion means and the output conversion means, for actuating each input conversion means and its associated output conversion means at a multiplex conversion rate determined by the nature of the input and output signals, in accordance with a multiplex scan cycle of given duration; data storage means, connected to the input conversion means and the output conversion means, including at least N M-bit storage locations, at least one storage location associated with each communication port; and path control means, connected to the conversion control means and the data storage means, for correlating any and all possible combinations of two communication ports for data transfer calls and actuating the data storage means to effect a first series of data transfers of a parallel M-bit digital data signals from a storage location for the one port in a call to a storage location for the other port in that call and a second series of data transfers of M-bit parallel digital data signals from a storage location for the other port to a storage location for the one port in that call; and a data transfer system including: an M-bit parallel digital data bus, connected to the data storage means, for transferring digital data signals recorded at one location in the data storage means to another location in the data storage means; a multi-bit parallel digital transmit address bus connected to the path control means; sequence control means, connected to the transmit address bus, for supplying to the transmit address bus a sequence of multi-bit parallel digital transmit addresses in a transfer cycle of given duration comprising at least N transfer time slots, one transmit address and its time slot identifying each communication port; receive address bus means comprising at least one multi-bit parallel digital receive address bus connected to the path control means; and address decoder means connected to the data bus, the transmit address bus, and the receive address bus, for comparing a called port address derived from the data bus with the transmit addresses on the transmit address bus to find a match therebetween identifying the time slot of the called port; the address decoder means further comprising receive address output means to supply a called port address to the receive address bus means when a match is found and thereby enable the path control means to control the data storage means so that one series of data transfers occurs in the transfer time slot of the calling port in each call and the other series of data transfers occurs in the transfer time slot of the called port in that call.

Claim 23

A pulse code modulated digital automatic exchange according to claim 20 in which the period for each transfer time slot is less than one microsecond and the duration of the multiplex scan cycle is equal to the duration of the transfer cycle.

Claim 24

A pulse code modulated digital automatic exchange according to claim 21 in which: each input conversion means includes a multiplexer connecting a plurality of communication ports to an analog to digital converter; and each output conversion means includes a digital to analog converter connected to a de-multiplexer in turn connected to the same ports as the multiplexer.

Claim 25

A pulse code modulated digital automatic exchange according to claim 20, or claim 21, or claim 22, in which: the receive address bus means includes a multi-bit parallel receive address bus and a multi-bit parallel digital auxiliary receive address bus each interconnecting the address decoder means, the sequence control means, and the data storage means; and the address decoder means further comprises auxiliary receive address output means to apply a called port address to the auxiliary receive address bus when a match is found; the path control means further including receive address storage means, having one storage location for each communication port, for recording a called port address as a receive address for the calling port and for recording a calling port address as a receive address for the called port in each call.

Claim 26

A pulse code modulated digital automatic exchange according to claim 23, in which: the path control means comprises means for reading out each receive address recorded in the receive address store onto the receive address bus during the transfer time slot for the port assigned to the receive address store location in which that receive address is recorded; and the path control means further comprises transmit/receive address comparator means for comparing transmit addresses from the transmit address bus with receive addresses on the receive address bus to correlate any two ports in a data transfer call.

Claim 27

A pulse code modulated digital automatic exchange according to claim 24 in which: the data transfer system further includes a system control bus, interconnecting the path control means, the sequence control means, and the address decoder means, to supply on-hook, off-hook, and ring relay status information for each port, during its transfer time slot, to the sequence control means and the address decoder means; the data transfer system further includes an M-bit parallel digital tone data bus connecting the sequence control means to the data storage means; the sequence control means further includes a tone generator for generating a dial tone and a busy tone and selectively applying those tones, as M-bit parallel digital data words, to the tone data bus; and the sequence control means further includes tone enable control means, connected to the data store, to actuate the data store to substitute appropriate tone data from the tone data bus for digital data signals from the data bus during the second data transfer whenever a dial tone or busy tone status obtains.

Claim 28

A pulse code modulated digital automatic exchange according to claim 25 in which the data storage means comprises a plurality of data stores, each connected to a limited number of input conversion means and associated output conversion means, all of the data stores being interconnected by the digital data bus.

Claim 29

A pulse code modulated digital automatic exchange according to claim 26 in which each data store comprises an input data storage unit and an output data storage unit, each having an M-bit storage location for each port served by the associated input and output conversion means, and in which each data transfer shifts data from an input storage unit to an output storage unit.

Claim 30

A pulse code modulated digital automatic exchange according to claim 25, in which the conversion control means comprises a plurality of conversion control circuits, each connected to and actuating a limited number of input and output conversion means.

Claim 31

A pulse code modulated digital automatic exchange according to claim 28, in which each conversion control circuit is connected to and actuates two input conversion means and two output conversion means, and in which each input conversion means and each output conversion means is connected to eight communication ports.

Claim 32

A pulse code modulated digital automatic exchange according to claim 28 in which: the path control means comprises a plurality of path control circuits, each connected to one conversion control circuit and to the data storage means.

Claim 33

A pulse code modulated digital automatic exchange according to claim 30 in which the data storage means comprises a plurality of data stores, at least one for each path control circuit, all of the data stores being interconnected by the data bus.

Claim 34

A pulse code modulated digital automatic exchange according to claim 31 in which each data store is of dual construction, comprising an input data store having M inputs connected to the input conversion circuits served by one conversion control circuit, and an output data store having M outputs connected to the output conversion circuits served by the same conversion control circuit, with each input data store adapted to output parallel digital data signals onto the data bus and each output data store adapted to record parallel digital data signals from the data bus.

Claim 35

A pulse code modulated digital automatic exchange according to claim 32 in which each conversion control circuit is connected to and actuates two input conversion means and two output conversion means, and in which each input conversion means and each output conversion means is connected to eight communication ports.

Claim 36

A pulse code modulated digital automatic exchange for a telephone network or like communication network, comprising: an input/output system including: line connection means defining N communication ports; input multiplex conversion means connected to the communication ports for generating a multiplexed sequence of M-bit parallel digital data signals each representative of an input signal received at one communication port; output de-multiplex conversion means connected to the communication ports for converting M-bit parallel digital data signals to output signals and selectively applying those output signals to the communication ports; conversion control means, connected to the input conversion means and the output conversion means, for actuating the input conversion means and output conversion means at a multiplex conversion rate determined by the nature of the input and output signals; data storage means connected to the input conversion means and the output conversion means, including at least N M-bit storage locations, one storage location for each communication port; path control means, connected to the conversion control means and the data storage means, for correlating any and all possible combinations of two communication ports for data transfer calls and actuating the data storage means to effect a first series of transfers of digital data signals from a storage location for the one port in a call to a storage location for the other port in that call and a second series of transfers of digital data signals from a storage location for the other port to a storage location for the one port in that call; and a data transfer system including: an M-bit parallel digital data bus, connected to the data storage means, for transferring digital data signals recorded at one location in the data storage means to another location in the data storage means; transmit address generator means for generating a repetitive sequence of at least N multi-bit parallel digital transfer addresses, one specific address for each port, the entire sequence repeating within a transfer cycle of given duration having one time slot for each transfer address, each time slot being substantially less than one microsecond; a multi-bit parallel digital transmit address bus connecting the transmit address generator to the path control means; address decoder means, including address comparator means connected to the transmit address bus and the data bus, for comparing data from the data bus identifying a called port with the transmit addresses on the transmit address bus; and multi-bit parallel digital receive address bus means, interconnecting the address decoder means and the path control means, for transmitting calling and called port addresses to the path control means in time coordination to enable the path control means to perform the first series of data transfers in the transfer time slot assigned to the one port in a call and to perform the second series of transfers in the transfer time slot assigned to the other port in that call.

Claim 37

A pulse code modulated digital automatic exchange for a telephone network or like communication network, comprising: an input/output system including: line connection means defining N communication ports; input multiplex conversion means connected to the communication ports for generating a multiplexed sequence of M-bit parallel digital data signals each representative of an input signal received at one communication port; output de-multiplex conversion means connected to the communication ports for converting M-bit parallel digital data signals to output signals and selectively applying those output signals to the communication ports; conversion control means, connected to the input conversion means and the output conversion means, for actuating the input conversion means and output conversion means at a multiplex conversion rate determined by the nature of the input and output signals; data storage means connected to the input conversion means and the output conversion means, including at least N M-bit storage locations, one storage location for each communication port; path control means, connected to the conversion control means and the data storage means, for correlating any and all possible combinations of two communication ports for data transfer calls and actuating the data storage means to effect a first series of transfers of digital data signals from a storage location for the one port in a call to a storage location for the other port in that call and a second series of transfers of digital data signals from a storage location for the other port to a storage location for the one port in that call; and a data transfer system including: an M-bit parallel digital data bus, connected to the data storage means, for transferring digital data signals recorded at one location in the data storage means to another location in the data storage means; transmit address generator means for generating a repetitive sequence of at least N multi-bit parallel digital transfer addresses, one specific address for each port, the entire sequence repeating within a transfer cycle of given duration having one time slot for each transfer address, each time slot being substantially less than one microsecond; a multi-bit parallel digital transmit address bus connecting the transmit address generator to the path control means; address decoder means, including address comparator means connected to the transmit address bus and the data bus, for comparing data from the data bus identifying a called port with the transmit addresses on the transmit address bus; and multi-bit parallel digital receive address bus means, interconnecting the address decoder means and the path control means, for transmitting calling and called port addresses to the path control means in time coordination to enable the path control means to perform the first series of data transfers in the transfer time slot assigned to the one port in a call and to perform the second series of transfers in the transfer time slot assigned to the other port in that call.

Claim 38

A pulse code modulated digital automatic exchange according to claim 34 in which: the duration of each transfer time slot is less than one microsecond; the input conversion means comprises a series of multiplexers each connected to a limited number of ports; the output conversion means comprises a corresponding series of de-multiplexers each connected to the same ports as one of the multiplexers; the conversion control means actuates each multiplexer in accordance with a multiplex scan cycle of given duration; and the duration of the multiplex scan cycle is equal to the duration of the transfer cycle.

Claim 39

A pulse code modulated digital automatic exchange according to claim 34 or claim 35 in which: the path control means comprises receive address storage means for recording transmit addresses as receive addresses in N individual storage locations, one for each communication port; and the path control means further comprises transmit/receive address comparator means for comparing transmit addresses from the transmit address bus with receive addresses recorded in the receive address storage means to correlate any two ports for a data transfer call.

Claim 40

A pulse code modulated digital automatic exchange according to claim 36 in which: the receive address storage means comprises a plurality of receive address stores, each serving a limited number of ports and having a storage location for each port it serves; and the transmit/receive address comparator means compares receive addresses read out from the locations in the various receive address stores onto the receive address bus under control of the transmit addresses on the transmit address bus.

Claim 41

A pulse code modulated digital automatic exchange according to claim 37 in which: the data transfer system further includes a system control bus, interconnecting the path control means and the address decoder means, to supply on-hook, off-hook, and ring relay status information for each port, during its transfer time slot, to the address decoder means; the data transfer system further includes an M-bit parallel digital tone data bus connected to the data storage means; the data transfer system further includes a tone generator for generating a dial tone and a busy tone and selectively applying those tones, as M-bit parallel digital data words, to the tone data bus; and the data transfer system further includes tone enable control means, connected to the data store, to actuate the data store to substitute appropriate tone data from the tone data bus for digital data signals from the data bus during the second data transfer whenever a dial tone or busy tone status obtains.

Claim 44

The method of selective transmission of data between ports, in a pulse code modulated digital automatic exchange, according to claim 39, for an exchange in which at least some of the communication ports are telephone ports or the like carrying analog audio signals, in which step B comprises an analog to digital conversion, and comprising the following step: G. reconverting each digital data signal destined for a telephone port to analog form prior to step F.