US4543597A
Expired / Lapsed
US
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Dynamic semiconductor memory and manufacturing method thereof
Assignee: Toshiba Corp
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Filing: 1983-06-22
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Granted: 1985-09-24
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Expires: 2003-06-22
Abstract
Abstract A method to prevent dielectric breakdown of a thin gate insulating film of a memory cell capacitor of a dynamic semiconductor memory device such as a dynamic random access memory during fabrication of the memory. A diffusion layer of an n-conductivity type is formed on a predetermined surface region of a semiconductor substrate of a p-conductivity type so as to form a p-n junction. Then, there is formed a polycrystalline semiconductor layer which corresponds to a gate electrode and which is connected to the thin gate insulating film and partially contacts the diffusion layer. Thus the polycrystalline semiconductor layer is electrically connected to the substrate through a diode region which is formed of the p-n junction. The polycrystalline semiconductor layer is then etched in a reactive ion etching step, and any abnormal charges stored in the thin gate insulation layer during the reactive etching step are immediately discharged to the substrate.
Inventors
- 👤 Tadashi Shibata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 17:12
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/30; H10D; H10D89/00; H10D89/60; H10D89/601; H10D89/611
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
177 words
A method of manufacturing a dynamic semiconductor memory device having a plurality of memory cells each of which has a capacitor element, said method comprising the steps of: forming an electrically insulative film on a semiconductive substrate of a first conductivity type, said electrically insulative film being used for a dielectric body of said capacitor element of each of said memory cells and having an opening exposing a portion of the surface of said substrate; forming an electrically conductive layer on said insulative film and on said exposed portion of the surface of said substrate, said conductive layer corresponding to a gate electrode; and performing a reactive ion etching step on said conductive layer while maintaining an electric contact between said conductive layer and said substrate through said opening, whereby charges produced by the reactive ion etching and stored in said insulative film are removed to said substrate via said conductive layer, thereby preventing an increase in an electric field within said insulative film and preventing damage to said insulative film due to an electrostatic dielectric breakdown.
Claim 2
Independent Claim
177 words
A method of manufacturing a dynamic semiconductor memory device having a plurality of memory cells each of which has a capacitor element, said method comprising the steps of: forming an electrically insulative film on a semiconductive substrate of a first conductivity type, said electrically insulative film being used for a dielectric body of said capacitor element of each of said memory cells and having an opening exposing a portion of the surface of said substrate; forming an electrically conductive layer on said insulative film and on said exposed portion of the surface of said substrate, said conductive layer corresponding to a gate electrode; and performing a reactive ion etching step on said conductive layer while maintaining an electric contact between said conductive layer and said substrate through said opening, whereby charges produced by the reactive ion etching and stored in said insulative film are removed to said substrate via said conductive layer, thereby preventing an increase in an electric field within said insulative film and preventing damage to said insulative film due to an electrostatic dielectric breakdown.
Claim 3
Dependent Claim
52 words
The method according to claim 1, further comprising the step of forming a semiconductor layer on said exposed portion of said surface of said substrate, said semiconductor layer having a second conductivity type opposite to the first conductivity type of said substrate and serving to connect said conductive layer and said substrate.
Claim 4
Dependent Claim
91 words
The method according to claim 1, further comprising the step of forming a semiconductor layer on said exposed portion of said surface of said substrate, said semiconductor layer having the first conductivity type which is the same as the first conductivity type of said substrate and serving to connect said conductive layer and said substrate, whereby the charges which have any one of positive and negative polarities and which are stored in said insulative film are discharged to said substrate through said semiconductor layer irrespective of the polarity of the charges.
Claim 5
Dependent Claim
37 words
The method according to claim 3, further comprising an insulating step of electrically insulating said conductive layer from said semiconductor layer formed in said substrate, after the charges are discharged from said conductive layer to said substrate.
Claim 6
Dependent Claim
43 words
The method according to claim 4, wherein the insulating step includes the step of electrically insulating a first layer component of said conductive layer which contacts said semiconductor layer from a second layer component of said conductive layer which contacts said insulative film.
Claim 7
Dependent Claim
70 words
The method according to claim 4, wherein the insulating step includes the step of oxidizing a first layer component of said conductive layer of a polycrystalline semiconductor material so as to change the polycrystalline semiconductor material to an electrical insulating material, said first layer component contacting said semiconductor layer, whereby a second layer component of said conductive layer which contacts said insulative film is electrically insulated from said semiconductor layer.
Claim 8
Dependent Claim
51 words
The method according to claim 5, wherein said insulating step includes the step of oxidizing a portion of said conductive layer made of a polycrystalline semiconductor material so as to change the polycrystalline semiconductor material to an electrical insulating material, said portion being sandwiched between said first and second layer components.
Claim 9
Dependent Claim
45 words
The method according to claim 1, further comprising, after said reactive ion etching step, a step of cutting the electric contact between said conductive layer and said substrate through said opening to form a common gate electrode for said capacitor elements of said memory cells.
Claim 10
Dependent Claim
73 words
The method according to claim 8, wherein said step of cutting the electric contact between said conductive layer and said substrate comprises a step of etching said conductive layer and physically separating that portion of said surface of said substrate from other portions which constitute said capacitors of said memory cells, said physically separation etching being performed by an etching step which has a smaller charge storing effect than said reactive ion etching.
Claim 11
Dependent Claim
26 words
The method according to claim 9, wherein said step of cutting the electric contact between said conductive layer and said substrate comprises a liquid etching step.
Claim 12
Dependent Claim
27 words
The method according to claim 9, wherein said step of cutting the electric contact between said conductive layer and said substrate comprises an isotropic plasma etching step.
Claim 13
Dependent Claim
68 words
The method according to claim 8, wherein: a polycrystalline silicon layer is formed on said insulative layer as said electrical conductive layer; and said step of cutting the electric contact between said conductive layer and said substrate comprises a step of partially oxidizing said polycrystalline silicon layer to define an oxide layer portion which is in direct contact with said exposed portion of said surface of said substrate.
Claim 14
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 1.
Claim 15
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 8.
Claim 16
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 9.
Claim 17
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 10.
Claim 18
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 11.
Claim 19
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 12.
Claim 20
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 2.
Claim 21
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 3.
Claim 22
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 4.
Claim 23
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 5.
Claim 24
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 6.
Claim 25
Dependent Claim
13 words
A dynamic semiconductor memory device produced according to the method of claim 7.
References Cited (Backward Citations)
US3413497A
Cited
US3999212A
Cited
US4044373A
Cited
US3512058A
Cited
US3789503A
Cited
US4139935A
Cited
US4067099A
Cited
JPS53101294A
Cited
JPS55165681A
Cited
JPS56966A
Cited
JPS5775463A
Cited
US4455739A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-09-23 | 1989-03-25 | 1989-09-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-09-23 | 1993-03-25 | 1993-09-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-09-23 | 1997-03-25 | 1997-09-24 | $7700.00 | Window Closed / Lapsed |