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US4535529A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making semiconductor devices by forming an impurity adjusted epitaxial layer over out diffused buried layers having different lateral conductivity types

Assignee: US Philips Corp
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Filing: 1984-07-02
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Granted: 1985-08-20
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Expires: 2004-07-02
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Abstract

Abstract A method of manufacturing a semiconductor device is provided in which semiconductor circuit elements are provided in regions formed by diffusion from one or more buried layers into an epitaxial layer. The diffusion is carried out such that a surface layer having substantially the same doping as the original epitaxial layer is left above the diffused into epitaxial layer above the buried layer. The surface layer serves as a reference doping for insulated gate field effect transistors to be formed. This is of a particular importance for threshold voltage determinations in CMOS circuits having adjoining "twin tub" regions diffused from buried layers of opposite conductivity types.

Inventors

  • 👤 Pieter J. W. Jochems

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:29
CPC Classifications
H; H10; H10W; H10W15/00; H10D; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/02; H10D84/03; H10D84/038; H10P; H10P32/00; H10P32/10; H10P32/15; H10W15/01

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 133 words
A method of manufacturing a semiconductor device comprising the steps of forming at least a first buried layer of a first conductivity type by introducing a dopant into a surface of a semiconductor substrate, growing onto said substrate an epitaxial layer having a lower overall doping in atoms/cm 2 than said buried layer, forming a region of said first conductivity type in said epitaxial layer by diffusion from said buried layer, and providing surface adjoining semiconductor zones of a semiconductor circuit element in said region, wherein the improvement comprises the steps of limiting said diffusion into said epitaxial layer to form a surface layer of said epitaxial layer having substantially the same doping concentration as the original epitaxial layer, and providing at least one insulated gate field effect transistor in said surface layer.
Claim 2
Independent Claim 133 words
A method of manufacturing a semiconductor device comprising the steps of forming at least a first buried layer of a first conductivity type by introducing a dopant into a surface of a semiconductor substrate, growing onto said substrate an epitaxial layer having a lower overall doping in atoms/cm 2 than said buried layer, forming a region of said first conductivity type in said epitaxial layer by diffusion from said buried layer, and providing surface adjoining semiconductor zones of a semiconductor circuit element in said region, wherein the improvement comprises the steps of limiting said diffusion into said epitaxial layer to form a surface layer of said epitaxial layer having substantially the same doping concentration as the original epitaxial layer, and providing at least one insulated gate field effect transistor in said surface layer.
Claim 3
Dependent Claim 22 words
A method according to claim 1, wherein said epitaxial layer is of a second conductivity type opposite to said first conductivity type.
Claim 4
Dependent Claim 82 words
A method according to claim 1, wherein a second buried layer of said second conductivity type is formed beside said first buried layer, said second buried layer having a second dopant diffusing substantially at the same rate into said epitaxial layer as said dopant of said first buried layer, and wherein a second insulated gate field effect transistor having a structure complementary to said first field effect transistor is formed in a part of said epitaxial layer above said second buried layer.
Claim 5
Dependent Claim 82 words
A method according to claim 2, wherein a second buried layer of said second conductivity type is formed beside said first buried layer, said second buried layer having a second dopant diffusing substantially at the same rate into said epitaxial layer as said dopant of said first buried layer, and wherein a second insulated gate field effect transistor having a structure complementary to said first field effect transistor is formed in a part of said epitaxial layer above said second buried layer.
Claim 6
Dependent Claim 44 words
A method according to claim 1 or claim 2, wherein an ion implantation is carried out in a channel region of said field effect transistor in said surface layer, said ion implantation being with ions determining a threshold voltage of said field effect transistor.
Claim 7
Dependent Claim 118 words
A method according to claim 5, wherein after said diffusion an anti-oxidation mask is provided at least at an area of said field effect transistor, said anti-oxidation mask leaving exposed edge portions of said region; an implantation mask is provided outside said region, and channel stopper zones are formed selectively in said edge portions by another ion implantation, wherein said another ion implantation is carried out at an energy to enable ions to penetrate through said anti-oxidation mask but be stopped by said implantation mask, and wherein after said another ion implantation said implantation mask is removed and a sunken oxide pattern is formed by thermal oxidation in parts of said surface layer free of said anti-oxidation mask.
Claim 8
Dependent Claim 82 words
A method according to claim 6, wherein a second buried layer of said second conductivity type is formed beside said first buried layer, said second buried layer having a second dopant diffusing substantially at the same rate into said epitaxial layer as said dopant of said first buried layer, and wherein a second insulated gate field effect transistor having a structure complementary to said first field effect transistor is formed in a part of said epitaxial layer above said second buried layer.
Claim 9
Dependent Claim 23 words
A method according to claim 7, wherein said epitaxial layer is silicon, and phosphorus and boron are said dopants from said buried layers.
Claim 10
Dependent Claim 23 words
A method according to claim 4, wherein said epitaxial layer is silicon, and phosphorus and boron are said dopants from said buried layers.
Claim 11
Dependent Claim 23 words
A method according to claim 3, wherein said epitaxial layer is silicon, and phosphorus and boron are said dopants from said buried layers.

References Cited (Backward Citations)

US4443933A Cited
US4132573A Cited
US4128439A Cited
US4168997A Cited
US4466171A Cited
US4420872A Cited
US4420344A Cited
US4442591A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-08-19 1989-02-18 1989-08-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-08-19 1993-02-18 1993-08-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-08-19 1997-02-18 1997-08-20 $7700.00 Window Closed / Lapsed

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