Patent US4535319A successfully refreshed from Google Patents.
US4535319A
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Method and circuit for measuring nonlinearity in dual-flash analog-to-digital converter
Assignee: Tektronix Inc
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Filing: 1983-04-08
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Granted: 1985-08-13
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Expires: 2003-04-08
Abstract
Abstract A dual-flash analog-to-digital converter comprises a first quantizer (20) for quantizing an analog input in accordance with coarse amplitude levels and outputting a more significant bits signal (24) and a remainder analog signal (32); a second quantizer (34) for quantizing the remainder signal in accordance with fine amplitude levels to output a less significant bits signal (36); and digital corrective logic (38) which receives both digital signals and corrects carry errors in the quantization. An analog method of diagnosing errors in the operation of such circuit calls for applying the remainder signal (32) to a pair of comparators (45,46) having thresholds set at upper and lower ends of the normal quantization range of second quantizer (34). The output of the comparators is passed through an OR gate (48), a low pass filter (52,54) and another comparator (56) to provide an output indicator signal (58) when the remainder signal chronically falls outside of a predetermined range set by the threshold of comparator (56). Such method can be carried out digitally by modifying the digital corrective logic (38) to provide an additional output bit to indicate whether the second quantization is within or outside a normal quantization range. The output of the first quantizer (20) is monitored by the digital corrective logic (38) to provide a second additional bit indicating high analog input levels and to digitally apply video clipping to the output of the corrective logic.
Inventors
- 👤 Bruce J. Penney
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 03:25
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/10; H03M1/1071; H03M1/12; H03M1/34; H03M1/36; H03M1/361
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
175 words
A method for diagnosing nonlinearities in the internal operation of a dual-flash analog-to-digital converter including a first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a more-significant-digits digital output signal, numerically indicating a truncated portion of the analog input signal, and a remainder analog signal corresponding to the undigitized portion of the analog input signal, and a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels to produce a less-significant-digits digital output signal numerically indicating the value of the remainder analog signal; the method comprising: applying an analog input test signal to the converter; repetitively actuating the converter to convert said test signal to produce said digital output signals and remainder analog signal; comparing the remainder analog signal to a predetermined threshold to produce an error signal whenever the remainder analog signal exceeds said threshold; and averaging the error signals from a plurality of successive actuations of the converter to produce an average error signal.
Claim 2
Independent Claim
175 words
A method for diagnosing nonlinearities in the internal operation of a dual-flash analog-to-digital converter including a first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a more-significant-digits digital output signal, numerically indicating a truncated portion of the analog input signal, and a remainder analog signal corresponding to the undigitized portion of the analog input signal, and a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels to produce a less-significant-digits digital output signal numerically indicating the value of the remainder analog signal; the method comprising: applying an analog input test signal to the converter; repetitively actuating the converter to convert said test signal to produce said digital output signals and remainder analog signal; comparing the remainder analog signal to a predetermined threshold to produce an error signal whenever the remainder analog signal exceeds said threshold; and averaging the error signals from a plurality of successive actuations of the converter to produce an average error signal.
Claim 3
Dependent Claim
55 words
A method according to claim 1 in which the repetitive actuation step comprises periodically actuating the converter at a predetermined frequency and the averaging step comprises time-averaging the error signals over a time interval substantially greater than the time between actuations of the converter to produce a time-average error signal defining said average error signal.
Claim 4
Dependent Claim
34 words
A method according to claim 1, including comparing the average error signal to a predetermined error signal threshold to produce an error indicator signal whenever the average error signal exceeds said error signal threshold.
Claim 5
Dependent Claim
66 words
A method according to claim 1, in which the comparing step further includes comparing the numerical value of said more-significant digits to a predetermined level threshold to produce a level signal whenever said value exceeds said level threshold, and the averaging step includes averaging the level signals from a plurality of successive actuations of the converter to produce, from the level signal, an average level signal.
Claim 6
Dependent Claim
34 words
A method according to claim 4, including comparing the average level signal to a predetermined level signal threshold to produce a level indicator signal whenever the average level signal exceeds said level signal threshold.
Claim 7
Dependent Claim
21 words
A method according to claim 1, in which the comparing step includes comparing the remainder analog signal to two different thresholds.
Claim 8
Dependent Claim
65 words
A method according to claim 1, in which the comparing step includes comparing the remainder analog signal to two different thresholds set one above and one below a predetermined quantizing range of the second quantizer means to produce a first error signal whenever the analog remainder signal is above said range and a second error signal whenever the analog remainder signal is below said range.
Claim 9
Dependent Claim
30 words
A method according to claim 7 including logically ORing said first and second error signals together to produce said error signal whenever the remainder signal is outside said quantizing range.
Claim 10
Independent Claim
244 words
A method for diagnosing nonlinearities in the internal operation of a dual-flash analog-to-digital converter including a first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a first digital signal, containing M more-significant-digits numerically indicating a truncated portion of the analog input signal, and a remainder analog signal corresponding to the undigitized portion of the analog input signal; a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels to produce a second digital signal containing N less-significant-digits numerically indicating the value of the remainder analog signal; and including at least one redundant digit for indicating a quantization error, in said first and second digital signals; and a digital error correcting means for detecting and correctig said quantization error to produce a corrected digital output signal containing fewer than M+N-1 digits numerically indicating the value of said analog input signal; the method comprising: applying an analog input signal to the converter; repetitively actuating the converter to produce said digital output signals and remainder analog singal; outputting an M+Nth digit defining an error signal whenever the digital error correcting means corrects a quantization error; time-averaging the error signals of successive repetitions of the foregoing steps to produce a time-averaged error signal; and comparing the time-averaged error signal to a predetermined error threshold to produce an error indicator signal whenever the time-averaged error signal exceeds said error threshold.
Claim 11
Independent Claim
244 words
A method for diagnosing nonlinearities in the internal operation of a dual-flash analog-to-digital converter including a first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a first digital signal, containing M more-significant-digits numerically indicating a truncated portion of the analog input signal, and a remainder analog signal corresponding to the undigitized portion of the analog input signal; a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels to produce a second digital signal containing N less-significant-digits numerically indicating the value of the remainder analog signal; and including at least one redundant digit for indicating a quantization error, in said first and second digital signals; and a digital error correcting means for detecting and correctig said quantization error to produce a corrected digital output signal containing fewer than M+N-1 digits numerically indicating the value of said analog input signal; the method comprising: applying an analog input signal to the converter; repetitively actuating the converter to produce said digital output signals and remainder analog singal; outputting an M+Nth digit defining an error signal whenever the digital error correcting means corrects a quantization error; time-averaging the error signals of successive repetitions of the foregoing steps to produce a time-averaged error signal; and comparing the time-averaged error signal to a predetermined error threshold to produce an error indicator signal whenever the time-averaged error signal exceeds said error threshold.
Claim 12
Dependent Claim
32 words
A method according to claim 9 including comparing said first digital signal to a predetermined level threshold to produce a high-level digital signal whenever the first digital signal exceeds said level threshold.
Claim 13
Independent Claim
193 words
A method for applying level clipping to a dual-flash analog-to-digital converter including a first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a first digital signal, containing M more-significant digits numerically indicating a truncated portion of the analog input signal, and a remainder analog signal corresponding to the undigitized portion of the analog input signal; a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels to produce a second digital signal containing N less-significant digits numerically indicating the value of the remainder analog signal; and including at least one redundant digit for indicating a quantization error, in said first and second digital signals; and a digital error correcting means for detecting and correcting said quantization error to produce a corrected digital output signal containing fewer than M+N digits numerically indicating the value of said analog input signal; the method comprising: comparing said first digital signal to a clipping threshold; and modifying said corrected digital output signal to a predetermined value whenever the first digital signal is outside a range defined by said threshold.
Claim 14
Independent Claim
193 words
A method for applying level clipping to a dual-flash analog-to-digital converter including a first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a first digital signal, containing M more-significant digits numerically indicating a truncated portion of the analog input signal, and a remainder analog signal corresponding to the undigitized portion of the analog input signal; a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels to produce a second digital signal containing N less-significant digits numerically indicating the value of the remainder analog signal; and including at least one redundant digit for indicating a quantization error, in said first and second digital signals; and a digital error correcting means for detecting and correcting said quantization error to produce a corrected digital output signal containing fewer than M+N digits numerically indicating the value of said analog input signal; the method comprising: comparing said first digital signal to a clipping threshold; and modifying said corrected digital output signal to a predetermined value whenever the first digital signal is outside a range defined by said threshold.
Claim 15
Dependent Claim
206 words
A dual-flash analog-to-digital converter comprising: first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a first digital signal, containing M more-significant digits and a remainder analog signal corresponding to the undigitized portion of the analog input signal; a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels having a total value exceeding the value of a least significant one of said more significant bits, a mid-portion of said fine quantizing levels defining a normal quantizing range and end portions thereof defining under-range and over-range quantizing ranges, to produce a second digital signal containing N less-significant digits indicating numerically the fine quantization level of the remainder analog signal; time generator means for periodically actuating said first and second quantizer means; and digital error correction means having as inputs said M more-significant digits and at least two most-significant of said M less-significant digits for generating therefrom a corrected digital output signal containing fewer than M+N data digits numerically indicating the value of the analog input signal and containing an error digit indicating whether the remainder analog signal was quantized in one of said over-range and under-range quantizing ranges.
Claim 16
Dependent Claim
206 words
A dual-flash analog-to-digital converter comprising: first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a first digital signal, containing M more-significant digits and a remainder analog signal corresponding to the undigitized portion of the analog input signal; a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels having a total value exceeding the value of a least significant one of said more significant bits, a mid-portion of said fine quantizing levels defining a normal quantizing range and end portions thereof defining under-range and over-range quantizing ranges, to produce a second digital signal containing N less-significant digits indicating numerically the fine quantization level of the remainder analog signal; time generator means for periodically actuating said first and second quantizer means; and digital error correction means having as inputs said M more-significant digits and at least two most-significant of said M less-significant digits for generating therefrom a corrected digital output signal containing fewer than M+N data digits numerically indicating the value of the analog input signal and containing an error digit indicating whether the remainder analog signal was quantized in one of said over-range and under-range quantizing ranges.
Claim 17
Dependent Claim
34 words
An analog-to-digital converter according to claim 12, including time-averaging means for averaging said error digit over a time interval encompassing a plurality of successive operations of said converter to produce a time-averaged error signal.
Claim 18
Dependent Claim
50 words
An analog-to-digital converter according to claim 13, including means for comparing the time averaged error signal to a predetermined threshold to produce an error indicator signal whenever the value of the time averaged error signal exceeds said threshold; and means responsive to said indicator signal for displaying said indicator signal.
Claim 19
Dependent Claim
58 words
An analog-to-digital converter according to claim 12 in which the digital error corrector means includes means for monitoring a most significant one of said more significant digits and including in said corrected digital output signal a level digit to indicate whether the analog input signal is at least as great as the quantization level of said selected digit.
Claim 20
Dependent Claim
34 words
An analog-to-digital converter according to claim 11, including time-averaging means for averaging said level digit over a time interval encompassing a plurality of successive operations of said converter to produce a time-averaged level signal.
Claim 21
Dependent Claim
49 words
An analog-to-digital converter according to claim 16, including means for comparing the time-averaged level signal to a predetermined threshold to produce a level indicator signal whenever the value of the time-averaged level signal exceeds said threshold; and means responsive to said indicator signal for visibly displaying said indicator signal.
Claim 22
Dependent Claim
89 words
An analog-to-digital converter according to claim 12, including a switchable clip enable signaling means for selectably inputting a clip enable signal to the digital error corrector means, the error corrector means including means responsive to the clip enable signal for comparing the value of the first digital signal to a predetermined digital value defining a limit of an output signal range and for modifying said corrected digital output signal whenever the first digital signal is outside said output range so as to substitute therefor a predetermined digital output signal.
Claim 23
Dependent Claim
255 words
A dual-flash analog-to-digital converter comprising: first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a first digital signal, containing M more-significant digits and a remainder analog signal corresponding to the undigitized portion of the analog input signal; a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels having a total value exceeding the value of a least significant one of said more significant bits, a mid-portion of said fine quantizing levels defining a normal quantizing range and end portions thereof of defining under-range and over-range quantizing ranges, to produce a second digital signal containing N less-significant digits indicating numerically the fine quantization level of the remainder analog signal; time generator means for periodically actuating said first and second quantizer means; and digital error correction means having as inputs said M more-significant digits and at least two most-significant of said less significant digits for generating from said inputs a corrected digital output signal; a switchable clip enable signaling means for selectably inputting a clip enable signal to the digital error corrector means; the error corrector means including means responsive to the clip enable signal for comparing the value of said M more-significant digits to a predetermined digital value defining a limit of an output signal range and for modifying said corrected digital output signal whenever the value of said more-significant digits is outside said output range so as to substitute therefor a predetermined digital output signal.
Claim 24
Dependent Claim
255 words
A dual-flash analog-to-digital converter comprising: first quantizer means for quantizing an analog input signal in accordance with a plurality of coarse quantizing levels to produce a first digital signal, containing M more-significant digits and a remainder analog signal corresponding to the undigitized portion of the analog input signal; a second quantizer means for quantizing the remainder analog signal in accordance with a plurality of fine quantizing levels having a total value exceeding the value of a least significant one of said more significant bits, a mid-portion of said fine quantizing levels defining a normal quantizing range and end portions thereof of defining under-range and over-range quantizing ranges, to produce a second digital signal containing N less-significant digits indicating numerically the fine quantization level of the remainder analog signal; time generator means for periodically actuating said first and second quantizer means; and digital error correction means having as inputs said M more-significant digits and at least two most-significant of said less significant digits for generating from said inputs a corrected digital output signal; a switchable clip enable signaling means for selectably inputting a clip enable signal to the digital error corrector means; the error corrector means including means responsive to the clip enable signal for comparing the value of said M more-significant digits to a predetermined digital value defining a limit of an output signal range and for modifying said corrected digital output signal whenever the value of said more-significant digits is outside said output range so as to substitute therefor a predetermined digital output signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-08-12 | 1989-02-11 | 1989-08-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-08-12 | 1993-02-11 | 1993-08-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-08-12 | 1997-02-11 | 1997-08-13 | $7700.00 | Window Closed / Lapsed |