US4528629A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic control apparatus with defined reset function
Assignee: Robert Bosch GmbH
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Filing: 1982-05-03
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Granted: 1985-07-09
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Expires: 2002-05-03
Abstract
Abstract To provide for starting of signal processing operations in a microprocessor (7), for example an automotive-type microprocessor, subject to frequent power interruptions, in which the processing operations are controlled by clock signals from a clock generator (1), and to insure that the microprocessor carries out its computation cycles only after the clock signal generator (1) provides clock signals at an adequate level appropriate for microprocessor operations, the level of the clock signals is sensed, for example in a peak rectifier (2, 3, 5) to reset the microprocessor when the clock signals have reached this level, thereby insuring commencing of processing cycles from a predetermined condition or state of the microprocessor at a time when adequate clock signals are available. The reset signal from the clock generator can be logically combined in a logic circuit (6) with externally generated reset signals, for example dependent on sufficient or suitable operating voltage being present for operation of the microprocessor from a power source (P), for example the battery of an automotive vehicle, to insure operation of the microprocessor only with adequate battery voltage being present, for example after termination of power drain by a starter motor.
Inventors
- 👤 Wolfram Breitling
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 00:04
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/24
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
223 words
Post-interruption resetting system for electronic control apparatus (7) having a clock generator (1) connected to supply clock pulses to the electronic control apparatus; and a reset control terminal (7a) connected to and selectively controlling resetting and operation of the electronic control apparatus (7), in dependence on a characteristic of a control signal applied to the reset terminal (7a) and holding said control apparatus (7) in reset condition until change of the characteristic of said control signal; comprising, in accordance with the invention, means (2, 3, 5) connected to the clock generator for sensing oscillatory output of the clock generator and providing an output signal when the oscillatory output is at a level sufficient for stable operation of said electronic control apparatus (7); and circuit means (6a, 6) connecting the output signal of said oscillation level sensing means to the reset control terminal (7a) of said electronic control apparatus upon sensing operation of the clock generator at a level sufficient for stable operation of the electronic control apparatus (7), said output signal of the sensing means changing the characteristic of the control signal being applied to the reset terminal (7a) of the electronic control apparatus (7) to enable operation of the electronic control apparatus only when the clock signals supplied thereto are at said level sufficient for stable operation of the electronic control apparatus.
Claim 2
Dependent Claim
223 words
Post-interruption resetting system for electronic control apparatus (7) having a clock generator (1) connected to supply clock pulses to the electronic control apparatus; and a reset control terminal (7a) connected to and selectively controlling resetting and operation of the electronic control apparatus (7), in dependence on a characteristic of a control signal applied to the reset terminal (7a) and holding said control apparatus (7) in reset condition until change of the characteristic of said control signal; comprising, in accordance with the invention, means (2, 3, 5) connected to the clock generator for sensing oscillatory output of the clock generator and providing an output signal when the oscillatory output is at a level sufficient for stable operation of said electronic control apparatus (7); and circuit means (6a, 6) connecting the output signal of said oscillation level sensing means to the reset control terminal (7a) of said electronic control apparatus upon sensing operation of the clock generator at a level sufficient for stable operation of the electronic control apparatus (7), said output signal of the sensing means changing the characteristic of the control signal being applied to the reset terminal (7a) of the electronic control apparatus (7) to enable operation of the electronic control apparatus only when the clock signals supplied thereto are at said level sufficient for stable operation of the electronic control apparatus.
Claim 3
Dependent Claim
45 words
System according to claim 1, wherein said sensing means comprises a rectifier system (2, 3, 5) connected to and rectifying the output from said clock generator (1), and providing an oscillation level signal, said oscillation level signal being connected to said circuit means (6, 6a).
Claim 4
Dependent Claim
95 words
System according to claim 1, wherein said circuit means includes a logic circuit (6); and means (8) are provided, coupled to said logic circuit for applying an external reset signal to said logic circuit, said logic circuit logically combining the external reset signal with the output signal derived from said sensing means, said logically combined signal forming said control signal and having said changed characteristic when the output signal is provided by the sensing means indicative of operation of the clock generator at said level sufficient for stable operation of the electronic control apparatus (7).
Claim 5
Dependent Claim
35 words
System according to claim 1, wherein said electronic control apparatus comprises a microprocessor (7), and at least part of said sensing means and part of said circuit means form an integrated circuit with the microprocessor.
Claim 6
Dependent Claim
159 words
System according to claim 1, wherein said electronic control apparatus comprises a vehicular-type microprocessor (7); the power source (P) is common to said clock generator (1) and to said microprocessor; the circuit means includes a logic circuit (6) having an input connected to said power source (P), and another input connected to receive the output signal from said sensing means, the logic circuit logically determining: (a) operation of said clock generator at said level sufficient for stable operation of the microprocessor (7); (b) voltage of said power source (P) at a level sufficient for stable operation of the microprocessor, said logic circuit providing said control signal which, upon conjunction of the conditions (a) and (b), has said changed characteristic to permit starting of a processing cycle in the microprocessor, and to enable a clock input (7b) of the microprocessor to receive clock signals from the clock generator (1) for carrying out a signal processing operation from a predetermined condition.
Claim 7
Dependent Claim
35 words
System according to claim 3, wherein said electronic control apparatus comprises a microprocessor (7), and at least part of said sensing means and part of said circuit means form an integrated circuit with the microprocessor.
Claim 8
Dependent Claim
168 words
Method of starting signal processing operations in a signal processing apparatus (7) utilizing clock signals applied and connected to the signal processing apparatus wherein the signal processing apparatus has a reset terminal (7a) to which a signal is applied which signal, in accordance with a predetermined characteristic thereof, holds the apparatus in reset condition until change of said characteristic of the control signal comprising, in accordance with the invention, the steps of generating clock signals; determining when the clock signals have reached a level sufficient for stable signal processing operation by the signal processing apparatus; changing said predetermined characteristic of the control signal being applied to said reset terminal of said signal processing apparatus as a consequence of the determination that the clock signals have reached said level sufficient for stable signal processing operation by the signal processing apparatus for starting a processing cycle only upon sensing that the level of the generated clock signals is at said level for stable processing operations by the signal processing apparatus.
Claim 9
Dependent Claim
168 words
Method of starting signal processing operations in a signal processing apparatus (7) utilizing clock signals applied and connected to the signal processing apparatus wherein the signal processing apparatus has a reset terminal (7a) to which a signal is applied which signal, in accordance with a predetermined characteristic thereof, holds the apparatus in reset condition until change of said characteristic of the control signal comprising, in accordance with the invention, the steps of generating clock signals; determining when the clock signals have reached a level sufficient for stable signal processing operation by the signal processing apparatus; changing said predetermined characteristic of the control signal being applied to said reset terminal of said signal processing apparatus as a consequence of the determination that the clock signals have reached said level sufficient for stable signal processing operation by the signal processing apparatus for starting a processing cycle only upon sensing that the level of the generated clock signals is at said level for stable processing operations by the signal processing apparatus.
Claim 10
Dependent Claim
111 words
Method according to claim 7, including the further step of sensing the level of an operating parameter required for signal processing operations by the signal processing apparatus and deriving a sensed signal; and logically combining the sensed signal representative of said operating parameter, and the level of the clock signals, and determining if the following conditions are satisfied: (a) the clock signals are at a level suitable for signal processing operations, and (b) said operating parameter is at a level sufficient for stable operation of the signal processing apparatus; and starting a processing cycle in the signal processing apparatus only upon said determination that said conditions (a) and (b) are satisfied.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-07-08 | 1989-01-07 | 1989-07-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-07-08 | 1993-01-07 | 1993-07-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-07-08 | 1997-01-07 | 1997-07-09 | $7700.00 | Window Closed / Lapsed |