Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
201 words
In a directional enhancement system for quadraphonic decoders having a matrix quadraphonic decoder, a detector, a processor and a matrix multiplier, said processor being operative to provide a plurality of control signals and including a variable limit dimension control system, said variable limit dimension control system comprising: a plurality of limiting devices equal in number to the number of control signal outputs provided in said processor, each one of said limiting devices having an input-output terminal coupled to a different one of said control signal outputs of said processor, and a control terminal, said limiting devices being operative to limit the maximum value of the voltage of any said control signals to the voltage present at said control terminal; a variable control voltage source; and a control device having an input and an output, said input of said control device being coupled to said variable control voltage source and said output of said control device being coupled to said control terminal of each one of said plurality of limiting devices, whereby any control signals developed by said processor are limited to a value less than or equal to the value that would be present in the absence of the dimension control.
Claim 2
Dependent Claim
201 words
In a directional enhancement system for quadraphonic decoders having a matrix quadraphonic decoder, a detector, a processor and a matrix multiplier, said processor being operative to provide a plurality of control signals and including a variable limit dimension control system, said variable limit dimension control system comprising: a plurality of limiting devices equal in number to the number of control signal outputs provided in said processor, each one of said limiting devices having an input-output terminal coupled to a different one of said control signal outputs of said processor, and a control terminal, said limiting devices being operative to limit the maximum value of the voltage of any said control signals to the voltage present at said control terminal; a variable control voltage source; and a control device having an input and an output, said input of said control device being coupled to said variable control voltage source and said output of said control device being coupled to said control terminal of each one of said plurality of limiting devices, whereby any control signals developed by said processor are limited to a value less than or equal to the value that would be present in the absence of the dimension control.
Claim 3
Dependent Claim
153 words
In a directional enhancement system for quadraphonic decoders having a matrix quadraphonic decoder, a detector, a processor having attack-decay circuits including charge storage devices, and a matrix multiplier, said processor being operative to provide a plurality of control signals and including a variable rate dimension control system, said variable rate dimension control system comprising: a plurality of voltage variable resistors equal in number to the number of control signals provided in said directional enhancement system, each one of said plurality of voltage-variable resistors having a resistive current path and a control terminal; the resistive current paths each forming part of the discharging devices of the attack-decay control circuits of said processor, and said control terminals being connected in common to an externally variable voltage to vary the rate of decay of charge of each of said charge storage devices forming part of said attack-decay circuit of said processor of said directional enhancement system.
Claim 4
Dependent Claim
153 words
In a directional enhancement system for quadraphonic decoders having a matrix quadraphonic decoder, a detector, a processor having attack-decay circuits including charge storage devices, and a matrix multiplier, said processor being operative to provide a plurality of control signals and including a variable rate dimension control system, said variable rate dimension control system comprising: a plurality of voltage variable resistors equal in number to the number of control signals provided in said directional enhancement system, each one of said plurality of voltage-variable resistors having a resistive current path and a control terminal; the resistive current paths each forming part of the discharging devices of the attack-decay control circuits of said processor, and said control terminals being connected in common to an externally variable voltage to vary the rate of decay of charge of each of said charge storage devices forming part of said attack-decay circuit of said processor of said directional enhancement system.