Directional enhancement system for quadraphonic decoders

Claim 3

The system as defined in claim 1 wherein said detector includes gain control circuitry for providing a gain control voltage and a reference voltage.

Claim 4

The system as defined in claim 1 wherein said detector includes a plurality of amplitude detectors.

Claim 5

The system as defined in claim 1 wherein said processor includes a signal attack and decay control circuitry.

Claim 6

The enhancement system as defined in claim 4 wherein said attack and decay circuitry comprises separate charge storage means associated wih each of said plurality of direction control signals, each of said charge storing means being charged by its associated direction control signal if only that associated direction control signal is present at a given time and retaining said charge for a given duration of time after said associated direction control signal ceases; and means to discharge a charged storage means when a direction control signal not associated with that charged storage means arises before the end of said duration of time.

Claim 7

The enhancement system as defined in claim 5 wherein means are provided with each of said separate charge storage means for limiting the charge that can be stored.

Claim 8

The enhancemment system as defined in claim 6 wherein each of said separate charge storage means is a capacitor.

Claim 9

The system as defined in claim 1 wherein said plurality of signals containing directional information are first, second, third and fourth composite signals and said plurality of output signals are first, second, third and fourth output signals.

Claim 10

The system as defined in claim 8 wherein said plurality of coefficient signals does not exceed sixteen in number.

Claim 11

The system as defined in claim 9 wherein said coefficient signals represent the coefficients of a matrix of dimension four by four as defined in mathematics.

Claim 12

The system as defined in claim 10 wherein said matrix multiplier means includes first, second, third and fourth composite multipliers.

Claim 13

The system as defined in claim 11 wherein said processor means includes signal attack and decay control circuitry.

Claim 14

The system as defined in claim 12 wherein said plurality of direction control signals does not exceed ten in number.

Claim 15

The system as defined in claim 13 wherein said detector means includes gain control circuitry for providing a gain control voltage and a reference level voltage.

Claim 16

In combination with a sound system which reproduces on four separate speakers four audio information signals contained in first, second, third and fourth composite signals derived from two other composite signals, each of said first, second, third and fourth composite signals including a combination of at least three of four said audio information signals with preselected amplitude and phase relationships, a system for enhancing the directional information content of said first, second, third and fourth composite signals to produce first, second, third and fourth output signals by means of a matrix multiplication process, comprising: a. detector means for producing a plurality of direction control signals in response to said first, second, third and fourth composite signals; b. processor means having a plurality of inputs equal in number to said plurality of direction control signals for producing in response to said plurality of direction control signals a plurality of matrix coefficient signals, the value of each of said coefficient signals at any time being determined by the values of said plurality of direction control signals; and, c. matrix multiplier means for multiplying said first, second, third and fourth composite signals by said plurality of coefficient signals, in accordance with the mathematical convention of multiplication of a vector by a matrix, to produce said first, second, third and fourth output signals, the values of said plurality of coefficient signals being such that when said first, second, third and fourth composite signals are multiplied by said plurality of coefficient signals to produce said first, second, third and fourth output signals, the predominant directional information contained in said first, second, third and fourth composite signals is substantially removed from all output signals other than those in which said predominant directional information should appear while the total effective power in the output signals due to every component of directional information present in said first, second, third and fourth composite signals is simultaneously maintained substantially unchanged.

Claim 17

In combination with a sound system which reproduces on four separate speakers four audio information signals contained in first, second, third and fourth composite signals derived from two other composite signals, each of said first, second, third and fourth composite signals including a combination of at least three of four said audio information signals with preselected amplitude and phase relationships, a system for enhancing the directional information content of said first, second, third and fourth composite signals to produce first, second, third and fourth output signals by means of a matrix multiplication process, comprising: a. detector means for producing a plurality of direction control signals in response to said first, second, third and fourth composite signals; b. processor means having a plurality of inputs equal in number to said plurality of direction control signals for producing in response to said plurality of direction control signals a plurality of matrix coefficient signals, the value of each of said coefficient signals at any time being determined by the values of said plurality of direction control signals; and, c. matrix multiplier means for multiplying said first, second, third and fourth composite signals by said plurality of coefficient signals, in accordance with the mathematical convention of multiplication of a vector by a matrix, to produce said first, second, third and fourth output signals, the values of said plurality of coefficient signals being such that when said first, second, third and fourth composite signals are multiplied by said plurality of coefficient signals to produce said first, second, third and fourth output signals, the predominant directional information contained in said first, second, third and fourth composite signals is substantially removed from all output signals other than those in which said predominant directional information should appear while the total effective power in the output signals due to every component of directional information present in said first, second, third and fourth composite signals is simultaneously maintained substantially unchanged.

Claim 18

The enhancement system as defined in claim 15 wherein said plurality of matrix coefficient signals does not exceed sixteen in number.

Claim 19

The enhancement system as defined in claim 15 wherein said coefficient signals represent the coefficients of a matrix of dimension four by four as defined in mathematics.

Claim 20

The enhancement system as defined in claim 17 wherein said matrix multiplier includes four separate composite multipliers.

Claim 21

The enhancement system as defined in claim 18 wherein each of said four composite multipliers comprises a first set of eight current devices; a second set of eight current devices; four pairs of input terminals for receiving the negative and positive components of four of said matrix coefficient signals; means to couple a different one of said current devices of both said first and second set of eight current devices to each terminal of four pairs of input terminals; first, second, third and fourth pairs of output terminals, each pair of said first, second, third and fourth pairs of output terminals providing a negative and positive terminal; means for coupling a different one of said current devices of both said first and second set of eight current devices to each terminal of said first, second, third and fourth pairs of output terminals to provide first, second, third and fourth negative-positive current signal pairs to said first, second, third and fourth pairs of output terminals respectively; a pair of voltage controlled current sources; means to apply one of said first, second, third and fourth composite signals to said pair of voltage-controlled current sources; means to couple one of said pair of voltage controlled current sources to said first set of eight current devices; and means to couple the other one of said pair of voltage controlled current sources to said second set of eight current devices.

Claim 22

The enhancement system as defined in claim 19 wherein said matrix multiplier further comprises first, second, third and fourth current to voltage converters; and wherein means are provided to couple a different pair of said four pairs of output terminals of each of said multipliers to each of said first, second, third and fourth current to voltage converters.

Claim 23

The enhancement system as defined in claim 20 wherein said matrix multiplier further includes first, second, third and fourth current amplifiers; means to couple said first, second, third and fourth composite signals to the input of said first, second, third and fourth current amplifiers respectively; and means to couple the output of said first, second, third and fourth current amplifiers to the input of said first, second, third and fourth current to voltage converters respectively.

Claim 24

The enhancement system as defined in claim 21 wherein said processor means includes attack and decay circuitry.

Claim 25

The enhancement system as described in claim 22 wherein said attack and decay circuitry comprises a plurality of individual attack and decay circuits.

Claim 26

The enhancement system as defined in claim 23 wherein said processor further includes a plurality of processor signal combiners; and means to apply the output of more than one of said attack and decay circuits to each of said processor signal combiners to provide a different one of said plurality of matrix coefficient signals at the output of each of said plurality of processor signal combiners.

Claim 27

The enhancement system as defined in claim 24 wherein said attack and decay circuitry comprises separate charge storage means associated with each of said plurality of direction control signals, each of said charge storing means being charged by its associated direction control signal if only that associated direction control signal is present at a given time and retaining said charge for a given duration of time after said associated direction control signal ceases; and means to discharge a charged storage means when a direction control signal not associated with that charged storage means arises before the end of said duration of time.

Claim 28

The enhancement system as defined in claim 25 wherein means are provided with each of said separate charge storage means for limiting the charge that can be stored.

Claim 29

The enhancement system as defined in claim 26 wherein each of said separate charge storage means is a capacitor.

Claim 30

The enhancement system as defined in claim 27 wherein said plurality of control signals does not exceed ten in number.

Claim 31

The enhancement system as defined in claim 28 wherein said processor means includes gain control circuitry for generating a gain control voltage and a reference level voltage.

Claim 32

The enhancement system as defined in claim 29 wherein said detector means comprises first, second, third and fourth variable gain amplifiers each having a signal input, a gain control voltage input and an output; means to couple said first, second, third and fourth composite signals to the signal input of said first, second, third and fourth variable gain amplifiers respectively; first, second, third and fourth attenuators each having an input and an output; means to couple the output of said first, second, third and fourth variable gain amplifiers to said input of said first, second, third and fourth attenuators respectively; a plurality of signal combiners each having an input and an output; means to couple the output of at least two of said first, second, third and fourth variable gain amplifiers to the input of each of said plurality of signal combiners; a plurality of rectifiers equal in number to the sum of said plurality of signal combiners and said first, second, third and fourth attenuators, each of said plurality of rectifiers having an input and an output; means to couple said output of a different one of said plurality of signal combiners and said first, second, third and fourth attenuators to said input of each of said plurality of rectifiers; means coupled to the said output of all of said plurality of rectifiers for deriving a control voltage; means to apply said control voltage to said gain control input of each of said first, second, third and fourth variable amplifiers as a gain control voltage; a plurality of smoothing filters equal in number to said plurality of rectifiers, each of said smoothing filters having an input and an output; means to couple said output of a different one of said plurality of rectifiers to said input of each said plurality of smoothing filters; a plurality of comparators each having first and second inputs and an output; means to apply said control voltage to said first input of all of said plurality of comparators as a reference level voltage; and means to couple said output of a different one of said plurality of said smoothing filters to said second input of each of said plurality of comparators whereby each one of said plurality of comparators provides on its respective output one of said plurality of direction control signals, whenever the input signal at its first input exceeds that at its second input.

Claim 33

The enhancement system as defined in claim 30 wherein said means for deriving a control voltage comprises a plurality of resistors equal in number to said plurality of rectifiers; a summing amplifier having an input and an output; means to couple one end of all of said plurality of resistors to said input of said summing amplifier; means to couple the output of a different one of said plurality of rectifiers to the other end of each resistor of said plurality of resistors, a unity gain inverter having an input and an output; means to couple said output of said summing amplifier to said input of said unity gain inverter whereby said control voltage is provided on said output of said unity gain inverter.