Decoder for use in 4-2-4 matrix playback system

Claim 2

A decoder for use in a multi-directional acoustic system in which at least four directional audio input signals associated with front-left and right channels and rear-left and right Channels are encoded into two channel signals and the two channel signals are decoded into at least four audio output signals, said decoder comprising: filter means for dividing said two channel signals into at least first and second frequency bands; at least one first control unit connected to receive the two channel signals of the first frequency band to generate control outputs for detecting a phase relation between the two channel signals to produce control outputs; first variable matrix circuit means connected to receive the two channel signals of the first frequency band and adapted to generate four two-channel signal intermixed output such that relative amplitude ratios between the two channel signals are varied in response to control outputs from said control unit; at least one second control unit connected to receive the two channel signals of the second frequency band and for detecting a phase relation between the two channel signals to produce control outputs; second variable matrix circuit means connected to receive the two channel signals of the second frequency band and adapted to generate four two-channel signal intermixed outputs such that relative amplitude ratios between the two channel signals are varied in response to control outputs from said second control unit; and means for combining together the corresponding outputs from said first and second variable matrix circuit means.

Claim 3

A decoder according to claim 1 in which said first and second control units are adapted to generate first and second control outputs in response to a phase relation between front and rear channels, and each of said first and second variable matrix circuit means includes first means for generating a difference output of the first and second channel signals; second means for varying the amplitude of the difference signal in response to the first control output; third means for generating a sum output of the first and second channel signals; fourth means for varying the amplitude of the sum output in response to the second control output; fifth means for combining, with the same polarity, the first and second channel signals and an output of said second means; sixth means for combining the first and second channel signals and the output of the second means in a manner that the first and second channel signals are opposite in polarity to the output of said second means; seventh means for combining the first and second channel signals and the output of said second means in a manner that the second channel signal is opposite in polarity to the first channel signal and the output signal of said second means; eighth means for combining the first and second channel signals and an output of said fourth means in a manner that the first channel signal is opposite in polarity to the second channel signal and the output signal of said fourth means.

Claim 4

A decoder according to claim 2 in which said control unit includes a phase discriminator for detecting a phase difference between the two channel signals.

Claim 5

A decoder according to claim 2 in which said control unit includes a level comparator for detecting a phase difference between the two channel signals according to a level difference between a sum and a difference signal of the two channel signals.

Claim 6

A decoder according to claim 1 further comprising third and fourth control units, and wherein each of said first and second control units is adapted to produce first and second control outputs in response to a phase relationship between front and rear channels, and each of said third and fourth control units is adapted to produce third and fourth control outputs in response to a phase relationship between left and right channels, and wherein each of said first and second variable matrix circuit means includes first means for generating a difference signal of the first and second channel signals; second means for varying the amplitude of the difference signal in response to the first control output; third meaNs for generating a sum signal of the first and second channel signals; fourth means for varying the amplitude of the sum signal in response to the second control output; fifth means for varying the amplitude of the first channel signal in response to the third control output; sixth means for varying the amplitude of the second channel signal in response to the fourth control output; seventh means for combining, with the same polarity and at a predetermined relative amplitude ratio, the first and second channel signals, output signal of said second means and output signal of said sixth means; eighth means for combining the first and second channel signals, output signal of said second means, and output signal of said fifth means at a predetermined relative amplitude ratio and in a manner that the output signal of said second means is opposite in polarity to the first and second channel signals and output signal of said fifth means; ninth means for combining the first and second signals, output signal of said fourth means and output signal of said sixth means at a predetermined relative amplitude ratio and in a manner that the first channel signal and output signal of said fourth means are opposite in polarity to the second channel signal and output signal of said sixth means; tenth means for combining the first and second channel signals, output of said fourth means and output signal of said fifth means and at a predetermined relative amplitude ratio and in a manner that the second channel signal and output signal of said fourth means are opposite in polarity to the first channel signal and output signal of said fifth means.

Claim 7

A decoder according to claim 5 in which each of said third and fourth control units includes a level comparator for detecting a level difference between the first and second channel signals.

Claim 8

A decoder according to claim 5 in which each of said third and fourth control units includes a phase shifting means for introducing a 45* phase difference between the first and second channel signals; an adder means for producing a sum signal of the outputs of said phase shifting means; a subtractor means for producing a difference signal of the outputs of said phase shifting means; and a phase discriminator means for detecting a phase difference between the sum signal and the difference signal.

Claim 9

A decoder according to claim 1 in which said first and second control units are adapted to generate first and second control outputs in response to a phase relation between the front and rear channels and each of said first and second variable matrix circuit means includes first and second phase shifting means for phase shifting the two channel signals a reference amount; first means for producing a difference signal of the phase-shifted two channel signals; second means for controlling the amplitude of the difference signal based on the first control output; third means for additively combining an output signal of said second means and the phase-shifted two channel signals; fourth means for subtractively combining the output signal of said second means and phase-shifted two channel signals; fifth means for producing a sum signal of the two channel signals; sixth means for controlling the amplitude of an output of said fifth means based on the second control output; third phase shifting means connected in circuit with said sixth means and adapted to introduce a 90* phase difference between the output signal of said fifth means and the phase-shifted two channel signals; seventh means for subtractively combining an output signal of said sixth means and phase-shifted two channel signals opposite in polarity thereto; and eighth means for additively combining an output signal of said sixth means and phase-shifted two channel signals opposite in polarity thereto.