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US4523963A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating MOS device on a SOS wafer by stabilizing interface region with silicon and oxygen implant

Assignee: Toshiba Corp
•
Filing: 1984-02-27
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Granted: 1985-06-18
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Expires: 2004-02-27
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Abstract

Abstract A method for manufacturing a semiconductor device, comprising the steps of forming a monocrystalline silicon layer on a sapphire substrate, ion-implanting silicon and oxygen in a portion of the silicon layer which is in the vicinity of an interface between the substrate and the silicon layer, performing annealing to improve a crystal structure of the portion of the silicon layer in the vicinity of the interface and forming an insulation layer, selectively forming an element isolation region in the silicon layer to obtain an island silicon layer, forming a gate insulation film on the island silicon layer, forming a gate electrode on the gate insulation film, ion-implanting an impurity in the island silicon layer by using the gate electrode as a mask, and annealing a resultant structure to form source and drain regions in the island silicon layer such that bottoms thereof reach a surface of the insulation layer.

Inventors

  • 👤 Takao Ohta
  • 👤 Junichi Ohno

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 13:25
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6706; H10D30/6758; H10D30/6759; H10D86/00; H10D86/01; H10D86/03; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2921; H10P14/2926; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/3238; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/38; H10P14/3822; H10P30/208; H10P30/21; H10P30/212; H10P30/28; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P95/00; H10P95/90; H10W; H10W10/00; H10W10/01; H10W10/061; H10W10/10; H10W10/181; H10P90/1908; H10W10/011; H10W10/012; H10W10/13

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 171 words
A method of fabricating a MOS device on a SOS wafer by stabilizing an interface region with a silicon and oxygen implant, comprising the steps of: forming a monocrystalline silicon layer on a sapphire substrate; ion-implanting silicon and oxygen in a portion of said silicon layer, which is located in the vicinity of said interface between said sapphire substrate and said silicon layer; annealing the resultant structure to improve a crystal structure of said portion of said silicon layer in the vicinity of said interface, and forming an insulation layer at said interface; selectively forming an element isolation region in said silicon layer to obtain an island silicon layer; forming a gate insulation film on said island silicon layer; forming a gate electrode on said gate insulation film; ion-implanting an impurity in said island silicon layer by using said gate electrode as a mask; and annealing the resultant structure to form source and drain regions in said island silicon layer such that bottoms thereof reach a surface of said insulation layer.
Claim 2
Independent Claim 171 words
A method of fabricating a MOS device on a SOS wafer by stabilizing an interface region with a silicon and oxygen implant, comprising the steps of: forming a monocrystalline silicon layer on a sapphire substrate; ion-implanting silicon and oxygen in a portion of said silicon layer, which is located in the vicinity of said interface between said sapphire substrate and said silicon layer; annealing the resultant structure to improve a crystal structure of said portion of said silicon layer in the vicinity of said interface, and forming an insulation layer at said interface; selectively forming an element isolation region in said silicon layer to obtain an island silicon layer; forming a gate insulation film on said island silicon layer; forming a gate electrode on said gate insulation film; ion-implanting an impurity in said island silicon layer by using said gate electrode as a mask; and annealing the resultant structure to form source and drain regions in said island silicon layer such that bottoms thereof reach a surface of said insulation layer.

References Cited (Backward Citations)

US3909307A Cited
US4177084A Cited
US4178191A Cited
US4385937A Cited
US4437225A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-06-17 1988-12-17 1989-06-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-06-17 1992-12-17 1993-06-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-06-17 1996-12-17 1997-06-18 $7700.00 Window Closed / Lapsed

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