Binary number substitution mechanism

Claim 1

A binary number substitution mechanism including first and second storage arrays comprised of 2 n storage locations and 2 p storage locations respectively, each first and second storage array including access means for addressing and read-out of data stored in the storage locations, m input binary signal lines, including an n-bit portion and a p-bit portion, for representing 2 m binary numbers, gate means, selectively and simultaneously interconnecting the n-bit portion to the access means of the first storage array, and the p-bit portion to the access means of the second storage array, and enabling means having an output signal connected to the gate means, and connected and responsive to one or more binary number representations of the m input binary signal lines, for causing read-out of a substitute binary number from the first and second storage arrays comprised of n parallel output binary signal lines from the first storage array and p parallel output binary signal lines from the second storage array, the improvement comprising: register means comprised of m binary storage positions; and means simultaneously connecting the n parallel output binary signal lines from the first storage array to said register means in every other one of said binary storage positions, and the p parallel output binary signal lines from the second storage array to said register means in the other of said binary storage positions.