Patent US4507783A successfully refreshed from Google Patents.
US4507783A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Error detection circuitry for digital systems
Assignee: Nokia Bell Labs
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Filing: 1983-02-28
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Granted: 1985-03-26
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Expires: 2003-02-28
Abstract
Abstract Circuitry for detecting errors in a digital bit stream comprising a succession of data blocks and wherein each data block incorporates a parity check. At an error monitoring location, a bistable device toggles in response to either a logical "1" or "0" in the bit stream. The output of the bistable device is sampled at a submultiple of the bit rate and compared with a predetermined criterion to detect bit errors.
Inventors
- 👤 Stewart S. Austin
- 👤 Joseph J. Baldini, III
- 👤 Joel E. Jakubson
- 👤 Clarke S. Ryan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 07:17
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004; H04L1/0056; H04L1/0057; H04L7/00; H04L7/04; H04L7/048
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
81 words
Circuitry for detecting errors in a bit stream comprising data and parity bits arranged into a succession of data blocks wherein each block has a bit rate and a given parity, said circuitry comprising means for toggling between two states solely in response to the occurrence of a predetermined bit value in said bit stream, means for sampling the state of said toggle at a submultiple of said bit rate, and means for comparing said sampled states against a predetermined criterion.
Claim 2
Dependent Claim
81 words
Circuitry for detecting errors in a bit stream comprising data and parity bits arranged into a succession of data blocks wherein each block has a bit rate and a given parity, said circuitry comprising means for toggling between two states solely in response to the occurrence of a predetermined bit value in said bit stream, means for sampling the state of said toggle at a submultiple of said bit rate, and means for comparing said sampled states against a predetermined criterion.
Claim 3
Dependent Claim
17 words
The circuitry of claim 1 wherein said data blocks are contiguous and said given parity is even.
Claim 4
Dependent Claim
31 words
The circuitry of claim 1 wherein said submultiple of said bit rate is equal to said nominal bit rate divided by the number of bits in each of said data blocks.
Claim 5
Dependent Claim
19 words
The circuitry of claim 3 wherein each of said data blocks comprises 186 bits inclusive of one parity bit.
Claim 6
Dependent Claim
24 words
The circuitry of claim 1 wherein said comparing means inhibits said sampling means for one bit period if said predetermined criterion is not met.
Claim 7
Dependent Claim
43 words
The circuitry of claim 4 wherein said comparing means generates an error signal if said predetermined criterion is not met after inhibiting said sampling means by a number of bit periods not less than the number of bit periods in said data blocks.
Claim 8
Dependent Claim
20 words
The circuitry of claim 1 wherein each of said blocks comprises a parity bit in the last transmitted bit position.
Claim 9
Dependent Claim
98 words
Circuitry for detecting errors in a bit stream comprising a series of data blocks and wherein each data block further comprises at least one data bit and at least one parity bit, said circuitry comprising means for toggling between two states solely in response to a predetermined bit value in said bit stream, means for sampling a subset of toggle states occurring in response to each of said blocks, the size of said subset being equal to the number of parity bits in each block, and means for detecting changes in the subset sampled from block to block.
Claim 10
Dependent Claim
98 words
Circuitry for detecting errors in a bit stream comprising a series of data blocks and wherein each data block further comprises at least one data bit and at least one parity bit, said circuitry comprising means for toggling between two states solely in response to a predetermined bit value in said bit stream, means for sampling a subset of toggle states occurring in response to each of said blocks, the size of said subset being equal to the number of parity bits in each block, and means for detecting changes in the subset sampled from block to block.
Claim 11
Independent Claim
79 words
A method of detecting errors in a bit stream comprising data and parity bits arranged into a succession of data blocks wherein each block has a bit rate and a given parity, said method comprising the steps of toggling between two states solely in response to the occurrence of a predetermined bit value in said bit stream, sampling the state of said toggle at a submultiple of said bit rate, and comparing said sampled states against a predetermined criterion.
Claim 12
Independent Claim
79 words
A method of detecting errors in a bit stream comprising data and parity bits arranged into a succession of data blocks wherein each block has a bit rate and a given parity, said method comprising the steps of toggling between two states solely in response to the occurrence of a predetermined bit value in said bit stream, sampling the state of said toggle at a submultiple of said bit rate, and comparing said sampled states against a predetermined criterion.
Claim 13
Independent Claim
96 words
A method of detecting errors in a bit stream comprising a series of data blocks and wherein each data block further comprises at least one data bit and at least one parity bit, said method comprising the steps of toggling between two states solely in response to a predetermined bit value in said bit stream, sampling a subset of toggle states occurring in response to each of said blocks, the size of said subset being equal to the number of parity bits in each block, and detecting changes in the subset sampled from block to block.
Claim 14
Independent Claim
96 words
A method of detecting errors in a bit stream comprising a series of data blocks and wherein each data block further comprises at least one data bit and at least one parity bit, said method comprising the steps of toggling between two states solely in response to a predetermined bit value in said bit stream, sampling a subset of toggle states occurring in response to each of said blocks, the size of said subset being equal to the number of parity bits in each block, and detecting changes in the subset sampled from block to block.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-03-25 | 1988-09-24 | 1989-03-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-03-25 | 1992-09-24 | 1993-03-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-03-25 | 1996-09-24 | 1997-03-26 | $7700.00 | Window Closed / Lapsed |