Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
213 words
An active pull-up circuit comprising: a power source terminal connected for receiving a power source voltage; an input terminal connected for receiving a pull-up signal which is generated after a precharge period; capacitive means having a first end connected to said input terminal; a first MOS transistor having a current path connected between a second end of said capacitive means and a signal line; a second MOS transistor having a current path connected between said power source terminal and signal line and having a gate connected to a junction between said capacitive means and first MOS transistor, said signal line being precharged through said second MOS transistor to a power source voltage level during said precharge period; and control means for supplying a first output voltage to a gate of said first MOS transistor in response to a precharge signal which is generated during said precharge period, said first output voltage being kept higher than the sum of the power source voltage and a threshold voltage of said first MOS transistor, and supplying a second output voltage to the gate of said MOS transistor in response to a control signal which is generated after the lapse of said precharge period, said second output voltage being kept substantially equal to the power source voltage.
Claim 2
Dependent Claim
213 words
An active pull-up circuit comprising: a power source terminal connected for receiving a power source voltage; an input terminal connected for receiving a pull-up signal which is generated after a precharge period; capacitive means having a first end connected to said input terminal; a first MOS transistor having a current path connected between a second end of said capacitive means and a signal line; a second MOS transistor having a current path connected between said power source terminal and signal line and having a gate connected to a junction between said capacitive means and first MOS transistor, said signal line being precharged through said second MOS transistor to a power source voltage level during said precharge period; and control means for supplying a first output voltage to a gate of said first MOS transistor in response to a precharge signal which is generated during said precharge period, said first output voltage being kept higher than the sum of the power source voltage and a threshold voltage of said first MOS transistor, and supplying a second output voltage to the gate of said MOS transistor in response to a control signal which is generated after the lapse of said precharge period, said second output voltage being kept substantially equal to the power source voltage.
Claim 3
Dependent Claim
16 words
An active pull-up circuit according to claim 1, wherein said capacitive means is a MOS capacitor.
Claim 4
Dependent Claim
294 words
An active pull-up circuit comprising: a power source terminal connected for receiving a power source voltage; an input terminal connected for receiving a pull-up signal which is generated after a precharge period; capacitive means having a first end connected to said input terminal; a first MOS transistor having a current path connected between a second end of said capacitive means and a signal line; a second MOS transistor having a current path connected between said power source terminal and signal line and having a gate connected to a junction between said capacitive means and first MOS transistor, said signal line being precharged through said second MOS transistor to a power source voltage level during said precharge period; and control means including a third MOS transistor having its gate and drain connected to said power source terminal, a capacitor having one end connected to a source of said third MOS transistor and receiving at the other end a control signal which is generated after the lapse of said precharge period, a fourth MOS transistor having a gate connected to the source of said third MOS transistor, a source connected to the gate of said first MOS transistor and a drain connected to said power source terminal, and a capacitor having a first end connected to the source of said fourth MOS transistor and receiving at a second end a precharge signal which is generated during said precharge period, wherein said control means supplies to the gate of said first MOS transistor a voltage which, during said precharge period, is kept higher than the sum of the power source voltage and a threshold voltage of said first MOS transistor and, after the lapse of said precharge period, is kept substantially equal to the power source voltage.
Claim 5
Dependent Claim
294 words
An active pull-up circuit comprising: a power source terminal connected for receiving a power source voltage; an input terminal connected for receiving a pull-up signal which is generated after a precharge period; capacitive means having a first end connected to said input terminal; a first MOS transistor having a current path connected between a second end of said capacitive means and a signal line; a second MOS transistor having a current path connected between said power source terminal and signal line and having a gate connected to a junction between said capacitive means and first MOS transistor, said signal line being precharged through said second MOS transistor to a power source voltage level during said precharge period; and control means including a third MOS transistor having its gate and drain connected to said power source terminal, a capacitor having one end connected to a source of said third MOS transistor and receiving at the other end a control signal which is generated after the lapse of said precharge period, a fourth MOS transistor having a gate connected to the source of said third MOS transistor, a source connected to the gate of said first MOS transistor and a drain connected to said power source terminal, and a capacitor having a first end connected to the source of said fourth MOS transistor and receiving at a second end a precharge signal which is generated during said precharge period, wherein said control means supplies to the gate of said first MOS transistor a voltage which, during said precharge period, is kept higher than the sum of the power source voltage and a threshold voltage of said first MOS transistor and, after the lapse of said precharge period, is kept substantially equal to the power source voltage.