Method of integrating MOS devices of double and single gate structure

Claim 1

In a method for manufacturing a nonvolatile semiconductor memory device a method of forming an MOS device of double gate structure comprising the steps of: forming a first electroconductive layer which is superposed on a semiconductor substrate with a first insulating film interposed therebetween; forming a second electoconductive layer which is superposed on said first electroconductive layer with a second insulating film interposed therebetween; forming a control gate by selectively etching said second electroconductive layer; forming a floating gate by selectively etching said first electroconductive layer with said control gate as a mask, said floating gate being formed to have a length as viewed in a channel direction shorter than that of said control gate in the same direction; and introducing impurities by ion implantation into said semiconductor substrate with said control gate as a mask to form source and drain regions; and thermally processing said source and drain regions to extend these regions into those portions of said semiconductor substrate being under the end portions of said floating gate.