Patent US4491741A successfully refreshed from Google Patents.
US4491741A
Expired / Lapsed
US
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Active pull-up circuit
Assignee: Motorola Solutions Inc
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Filing: 1983-04-14
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Granted: 1985-01-01
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Expires: 2003-04-14
Abstract
Abstract An active pull-up circuit is provided which is process compensating. The active pull-up circuit contains a voltage reference which drives a source follower. The inverting output of the source follower controls a pull-up device which is in parallel with an active pull-up device. The active pull-up device can be much smaller in size since it is now assisted by the controlled pull-up device. The controlled pull-up device is held off until the active pull-up device pulls up the bus or line connected to the active pull-up circuit to a predetermined voltage level.
Inventors
- 👤 Lanny L. Parker
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 19:22
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0008; H03K19/0013; H03K19/01; H03K19/017; H03K19/01707; H03K19/01721
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
85 words
An active pull-up circuit comprising: a voltage reference circuit for providing an output reference voltage; a source follower coupled between the voltage reference circuit and an output node so that the output of the voltage reference circuit controllably varies an inverting output of the source follower; a first pull-up transistor coupled between a power supply terminal and the output node and having a control electrode coupled to the inverting output of the source follower, the output node providing the output for the active pull-up circuit.
Claim 2
Dependent Claim
85 words
An active pull-up circuit comprising: a voltage reference circuit for providing an output reference voltage; a source follower coupled between the voltage reference circuit and an output node so that the output of the voltage reference circuit controllably varies an inverting output of the source follower; a first pull-up transistor coupled between a power supply terminal and the output node and having a control electrode coupled to the inverting output of the source follower, the output node providing the output for the active pull-up circuit.
Claim 3
Dependent Claim
31 words
The active pull-up circuit of claim 1, further including a second pull-up transistor coupled in parallel with the first pull-up transistor, the second pull-up transistor being connected in a diode configuration.
Claim 4
Dependent Claim
39 words
The active pull-up circuit of claim 1 wherein the source follower is an inverter coupled between the power supply terminal and the output node and has its inverting output coupled to the control electrode of the first pull-up transistor.
Claim 5
Dependent Claim
122 words
An active pull-up for a microprocessor bus structure, comprising: a diode connected transistor coupled between a power supply terminal and the bus structure; a first transistor coupled in parallel with the diode connected transistor and having a control electrode; a second transistor coupled between the power supply terminal and the control electrode of the first transistor, the second transistor having a control electrode coupled to the control electrode of the first transistor; a third transistor coupled between the control electrode of the first transistor and the bus structure; a fourth and a fifth transistor connected in series to form a voltage reference and providing a reference voltage output, the reference voltage output being coupled to a control electrode of the third transistor.
Claim 6
Dependent Claim
122 words
An active pull-up for a microprocessor bus structure, comprising: a diode connected transistor coupled between a power supply terminal and the bus structure; a first transistor coupled in parallel with the diode connected transistor and having a control electrode; a second transistor coupled between the power supply terminal and the control electrode of the first transistor, the second transistor having a control electrode coupled to the control electrode of the first transistor; a third transistor coupled between the control electrode of the first transistor and the bus structure; a fourth and a fifth transistor connected in series to form a voltage reference and providing a reference voltage output, the reference voltage output being coupled to a control electrode of the third transistor.
Claim 7
Dependent Claim
23 words
The active pull-up of claim 4 wherein the second transistor is a depletion type transistor and the remaining transistors are enhancement type transistors.
References Cited (Backward Citations)
US3911289A
Cited
US3898477A
Cited
US3970875A
Cited
US4185321A
Cited
US4291393A
Cited
US4386284A
Cited
US4433390A
Cited
US4451907A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-01-01 | 1988-07-02 | 1989-01-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-01-01 | 1992-07-02 | 1993-01-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-01-01 | 1996-07-02 | 1997-01-01 | $7700.00 | Window Closed / Lapsed |