US4486753A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Bus line drive circuit
Assignee: Toshiba Corp
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Filing: 1982-07-16
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Granted: 1984-12-04
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Expires: 2002-07-16
Abstract
Abstract A bus line drive circuit comprising a bus line allowing data to transfer therethrough, a precharge circuit connected to the bus line for precharging the bus line with precharge pulse, input/output circuit connected to the bus line for transferring data to and from an ALU through the bus line, and positive feedback circuit connected to the bus line, which exhibits a high impedance during a precharge period to electrically be disconnected from the bus line, keeps a precharge potential when the potential on the bus line is equal to the precharge potential during an active period, and expands a potential difference when the potential on the bus line is slightly different from the precharge potential.
Inventors
- 👤 Yukihiro Saeki
- 👤 Kazuyuki Uchida
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 14:13
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4063; G06F13/4068; G06F13/4072; G06F13/4077; H; H03; H03K; H03K19/00; H03K19/0175; H03K19/0185; H03K19/018557
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
116 words
A bus line drive circuit comprising: a bus line allowing data to transfer therethrough; a precharge circuit connected to said bus line for precharging said bus line with precharge pulse; input/output circuit connected to said bus line for transferring data to and from a circuit through said bus line; and a positive feedback circuit connected to said bus line, which exhibits a high impedance during a precharge period to electrically be disconnected from said bus line, keeps a precharge potential when the potential on said bus line is equal to the precharge potential during an active period, and expands a potential difference when the potential on said bus line is slightly different from the precharge potential.
Claim 2
Dependent Claim
116 words
A bus line drive circuit comprising: a bus line allowing data to transfer therethrough; a precharge circuit connected to said bus line for precharging said bus line with precharge pulse; input/output circuit connected to said bus line for transferring data to and from a circuit through said bus line; and a positive feedback circuit connected to said bus line, which exhibits a high impedance during a precharge period to electrically be disconnected from said bus line, keeps a precharge potential when the potential on said bus line is equal to the precharge potential during an active period, and expands a potential difference when the potential on said bus line is slightly different from the precharge potential.
Claim 3
Dependent Claim
76 words
A bus line drive circuit according to claim 1, wherein said positive feedback circuit includes comparative means for comparing the potential on said bus line and a reference potential, a NOR gate for receiving an output signal from said comparator means and a precharge pulse, and a MOSFET connected at the gate to the output of said NOR gate and at the drain to said bus line, and coupled at the source with a predetermined potential.
Claim 4
Dependent Claim
58 words
A bus line drive circuit according to claim 1, wherein said positive feedback circuit includes comparator means for comparing a potential on said bus line with a reference potential, inverter means for phase-inverting a precharge pulse; and a NOR gate for receiving an output signal from said comparator means and a precharge pulse derived from said inverter means.
Claim 5
Dependent Claim
111 words
A bus line drive circuit according to claim 3, wherein said comparator means includes first and second MOSFETs connected in series between first and second potentials, a reference signal being applied to the gate of said first MOSFET, and the gate of said second MOSFET being connected to said bus line, and said NOR gate includes third and fourth MOSFETs connected in series between said bus line and said second power potential, the gate of said third MOSFET being connected to a junction between said first and second MOSFETs, and the gate of said fourth MOSFET being connected to said inverter means so as to receive a precharge pulse phase inverted.
Claim 6
Dependent Claim
74 words
A bus line drive circuit according to claim 1, wherein said positive feedback circuit includes comparator means of the CMOS type including a first MOSFET of a first channel type connected between said bus line and a first power potential source, and a second MOSFET of a second channel type, connected between a second power potential source and the gate of said first MOSFET, of which the gate is connected to said bus line.
Claim 7
Dependent Claim
46 words
A bus line drive circuit according to claim 5, wherein a third MOSFET of the first channel type is connected to said second MOSFET of the first channel type, which receives at the gate a precharge signal and discharges charges stored dynamically in said second MOSFET.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-12-04 | 1988-06-04 | 1988-12-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-12-04 | 1992-06-04 | 1992-12-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-12-04 | 1996-06-04 | 1996-12-04 | $7700.00 | Window Closed / Lapsed |