US4486672A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Drive circuits for driving digital circuits with a clock signal
Assignee: Sony Corp
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Filing: 1982-03-05
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Granted: 1984-12-04
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Expires: 2002-03-05
Abstract
Abstract A drive circuit comprises output transistors of complementary type serially coupled to each other between voltage supply terminals, auxiliary transistors of complementary type which have base electrodes respectively connected to the serial connection point between the output transistors and which are serially coupled between the respective base electrodes of the output transistors, and resistors serially coupled between the voltage supply terminals with their connection point coupled to the connection point of the auxiliary transistors. An input clock signal is supplied to the respective base electrodes of the output transistors via coupling capacitors, and an output clock pulse is derived from the serial connection point between the output transistors.
Inventors
- 👤 Toshimichi Nishimura
- 👤 Takashi Noguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 09:34
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/02; G; G11; G11C; G11C19/00; G11C19/28; G11C19/282; G11C19/285; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/66; H03K17/665; H03K17/666; H03K17/667
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
153 words
A drive circuit comprising: a pair of output transistors of opposite conductivity type having their emitter and collector terminals connected in series between two voltage source terminals, each of said output transistors having a base electrode; a pair of auxiliary transistors of opposite conductivity type having their emitter and collector terminals connected in series between the base electrodes of said output transistors, each of said auxillary transistors having a base electrode coupled to the common connection point between said ouput transistors; a resistive path connected between said voltage source terminals and having an intermediate point coupled to the common connection point between said auxillary transistors; coupling capacitors connected to the base electrodes of said output transistors for supplying an input clock signal to the base electrodes of said output transistors; and an output terminal coupled to the common connection point between said output transistors and from which an output clock signal is derived.
Claim 2
Dependent Claim
153 words
A drive circuit comprising: a pair of output transistors of opposite conductivity type having their emitter and collector terminals connected in series between two voltage source terminals, each of said output transistors having a base electrode; a pair of auxiliary transistors of opposite conductivity type having their emitter and collector terminals connected in series between the base electrodes of said output transistors, each of said auxillary transistors having a base electrode coupled to the common connection point between said ouput transistors; a resistive path connected between said voltage source terminals and having an intermediate point coupled to the common connection point between said auxillary transistors; coupling capacitors connected to the base electrodes of said output transistors for supplying an input clock signal to the base electrodes of said output transistors; and an output terminal coupled to the common connection point between said output transistors and from which an output clock signal is derived.
Claim 3
Dependent Claim
57 words
A drive circuit according to claim 1 including a pair of further transistors having their emitter and collector terminals connected in a series path with the emitter and collector terminals of said auxillary transistors for connecting said auxillary transistors to said voltage source terminals, said further transistors forming parts of respective discharge paths for said coupling capacitors.
Claim 4
Dependent Claim
42 words
A drive circuit according to claim 1 or claim 2 wherein a speed-up capacitor is coupled between the common connection point between said auxillary transistors and the terminal of each of said coupling capacitors opposite the end connected to said base electrodes.
Claim 5
Dependent Claim
46 words
A drive circuit according to claim 1 or claim 2 wherein said base electrodes of said auxiliary transistors are connected to said series-connection point between said output transistors by way of a resistor for reducing the effect of noise on the operation of said drive circuit.
Claim 6
Dependent Claim
21 words
A drive circuit according to claim 1 or claim 2 wherein said output terminal is coupled to a charge coupled device.
References Cited (Backward Citations)
US3319086A
Cited
US3649851A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-12-04 | 1988-06-04 | 1988-12-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-12-04 | 1992-06-04 | 1992-12-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-12-04 | 1996-06-04 | 1996-12-04 | $7700.00 | Window Closed / Lapsed |