US3319086A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High speed pulse circuits
Assignee: Unisys Corp
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Filing: 1965-02-11
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Granted: 1967-05-09
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Expires: 1985-02-11
Abstract
No abstract record available.
Inventors
- 👤 Yee Seening
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 22:05
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/02
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
163 words
A PULSE AMPLIFIER COMPRISING AN N-P-N INPUT TRANSISTOR CONNECTED IN A GROUNDED EMITTER CIRCUIT; A P-N-P INPUT TRANSISTOR CONNECTED IN A GROUND EMITTER CIRCUIT; A BASE, A COLLECTOR, AND AN EMITTER IN EACH OF SAID INPUT TRANSISTORS; MEANS TO APPLY AN INPUT PULSE TO THE BASES OF BOTH INPUT TRANSISTORS SO AS TO DRIVE THESE TRANSISTORS TO CUT OFF AND SATURATION; A SOURCE OF COLLECTOR VOLTAGE; A FIRST VOLTAGE DIVIDER INTERCONNECTING THE COLLECTOR OF THE N-P-N TRANSISTOR AND THE PLUS SIDE OF SAID COLLECTOR SOURCE; A SECOND VOLTAGE DIVIDER INTERCONNECTING THE COLLECTOR OF THE P-N-P TRANSISTOR AND THE MINUS SIDE OF SAID SOURCE; A JUNCTION POINT ON EACH OF SAID VOLTAGE DIVIDERS; A P-N-P OUTPUT TRANSISTOR; AN N-P-N OUTPUT TRANSISTOR; A BASE, A COLLECTOR, AND AN EMITTER IN EACH OF SAID OUTPUT TRANSISTORS; SAID P-N-P OUTPUT TRANSISTOR HAVING ITS BASE CONNECTED TO THE JUNCTION POINT ON SAID FIRST VOLTAGE DIVIDER; SAID N-P-N OUTPUT TRANSISTOR HAVING ITS BASE CONNECTED TO THE JUNCTION POINT ON
Claim 2
Dependent Claim
163 words
A PULSE AMPLIFIER COMPRISING AN N-P-N INPUT TRANSISTOR CONNECTED IN A GROUNDED EMITTER CIRCUIT; A P-N-P INPUT TRANSISTOR CONNECTED IN A GROUND EMITTER CIRCUIT; A BASE, A COLLECTOR, AND AN EMITTER IN EACH OF SAID INPUT TRANSISTORS; MEANS TO APPLY AN INPUT PULSE TO THE BASES OF BOTH INPUT TRANSISTORS SO AS TO DRIVE THESE TRANSISTORS TO CUT OFF AND SATURATION; A SOURCE OF COLLECTOR VOLTAGE; A FIRST VOLTAGE DIVIDER INTERCONNECTING THE COLLECTOR OF THE N-P-N TRANSISTOR AND THE PLUS SIDE OF SAID COLLECTOR SOURCE; A SECOND VOLTAGE DIVIDER INTERCONNECTING THE COLLECTOR OF THE P-N-P TRANSISTOR AND THE MINUS SIDE OF SAID SOURCE; A JUNCTION POINT ON EACH OF SAID VOLTAGE DIVIDERS; A P-N-P OUTPUT TRANSISTOR; AN N-P-N OUTPUT TRANSISTOR; A BASE, A COLLECTOR, AND AN EMITTER IN EACH OF SAID OUTPUT TRANSISTORS; SAID P-N-P OUTPUT TRANSISTOR HAVING ITS BASE CONNECTED TO THE JUNCTION POINT ON SAID FIRST VOLTAGE DIVIDER; SAID N-P-N OUTPUT TRANSISTOR HAVING ITS BASE CONNECTED TO THE JUNCTION POINT ON
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1970-05-08 | 1970-11-07 | 1971-05-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1974-05-08 | 1974-11-07 | 1975-05-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1978-05-08 | 1978-11-07 | 1979-05-09 | $7700.00 | Window Closed / Lapsed |