Analog multiplier circuit including opposite conductivity type transistors

Claim 2

An analog multiplier circuit comprising plural sources of input currents; a series aiding connected string of semiconductor junctions, each semiconductor junction being arranged for conducting an input current from one of the sources and producing a voltage proportional to a logarithm of the input current conducted therethrough; and means responsive to voltages at opposite ends of the string of junctions for converting a sum of the produced voltages into an output current proportional to the produce of the plural input currents.

Claim 3

An analog multiplier circuit in accordance with claim 1 wherein the plural sources of input currents comprise a differential amplifier for converting an input voltage into equal but oppositely polarized input signal currents in separate ones of the string of junctions, and the output current is proportional to the square of one of the input signal currents.

Claim 4

A monolithic integrated multiplier circuit comprising plural sources of input currents; a series aiding connection of semiconductor junctions, each semiconductor junction being arranged for conducting an input current from one of the sources and producing a voltage proportional to a logarithm of the input current conducted through that junction; and a pair of opposite conductivity type transistors having their emitters connected together and their bases responsive respectively to voltages at opposite ends of the series aiding connection for converting the voltage produced across the connection of semiconductor junctions into an output current proportional to the product of the input currents.

Claim 5

A monolithic integrated multiplier circuit comprising plural sources of input currents; a series aiding connection of semiconductor junctions, each semiconductor junction being arranged for conducting an input current from one of the sources and producing a voltage proportional to a logarithm of the input current conducted through that junction; and a pair of opposite conductivity type transistors having their emitters connected together and their bases responsive respectively to voltages at opposite ends of the series aiding connection for converting the voltage produced across the connection of semiconductor junctions into an output current proportional to the product of the input currents.

Claim 6

A monolithic integrated multiplier curcuit in accordance with claim 3 wherein the plural sources of input currents comprise a differential amplifier for converting an input voltage into equal but oppositely polarized input signal currents in separate ones of the semiconductor junctions, and the output current is proportional to the square of one of the input signal currents.

Claim 7

A monolithic integrated multiplier circuit in accordance with claim 3 wherein the magnitude of the voltage produced across the connection of semiconductor junctions is proportional to the sum of the logarithms of the magnitudes of the input currents, and the magnitude of the output current conducted through collector circuits of the pair of opposite conductivity type transistors is proportional to the product of the magnitudes of the plural input currents.

Claim 8

A monolithic integrated multiplier circuit in accordance with claim 3 further comprising means connected with the semiconductor junctions and the pair of opposite conductivity type transistors for biasing the junctions and the transistors to operate in the logarithmic portion of their characteristics.

Claim 9

A monolithic integrated multiplier circuit in accordance with claim 3 wherein two semiconductor junctions connected in series conduct each input current.

Claim 10

A current ratio circuit comprising first means for generating a first voltage proportional to a sum of logarithms of the magnitudes of a group of currents; second means for generating a second voltage proportional to a logarithm of the magnitude of a different current; means connected with the first and second means and responsive to a difference between the first and second voltages for producing an output current directly proportional to a product of the currents of the group of currents and inversely proportional to the different current; a group of current sources for supplying the group of currents to the first means; a different current source for supplying the different current to the second means; the first means including a first string of semiconductor junctions connected in series, each semiconductor junction conducting one of the group of currents, the first string of semiconductor junctions producing the first voltage thereacross; and the second means including one or more semiconductor junctions connected in series for conducting the different current and producing the second voltage thereacross.

Claim 11

A current ratio circuit comprising first means for generating a first voltage proportional to a sum of logarithms of the magnitudes of a group of currents; second means for generating a second voltage proportional to a logarithm of the magnitude of a different current; means connected with the first and second means and responsive to a difference between the first and second voltages for producing an output current directly proportional to a product of the currents of the group of currents and inversely proportional to the different current; a group of current sources for supplying the group of currents to the first means; a different current source for supplying the different current to the second means; the first means including a first string of semiconductor junctions connected in series, each semiconductor junction conducting one of the group of currents, the first string of semiconductor junctions producing the first voltage thereacross; and the second means including one or more semiconductor junctions connected in series for conducting the different current and producing the second voltage thereacross.

Claim 12

A current ratio circuit in accordance with claim 8 wherein the output current producing means include a pair of opposite conductivity type transistors, interconnected emitter-to-emitter and responsive to the first and second voltages, applied respectively to their bases, for producing the output current in their collector circuits.

Claim 13

A current ratio circuit in accordance with claim 9 further comprising means connected with the first and second means and with the producing means for biasing the pair of transistors and the semiconductor junctions of the first and second means to operate in the logarithmic portion of their characteristics.

Claim 14

A current ratio circuit in accordance with claim 10 wherein the first and second means and the output current producing means are fabricated as a monolithic integrated circuit.