Controlling a multi-wire printhead

Claim 2

Circuit apparatus for selectively energizing individual wires in an electroerosion printhead for forming marks on grounded metal coated paper including a plurality of wires adjacent the metal coated paper and arranged in M groups having an equal number N wires comprising: M selector transistors for selecting a group M of wires; N transistor switches for selecting individual wires in a group M; means for generating a first current from ground through the metal coated paper and each non-selected wire into a negative potential source to make a mark; and means for generating a second current from a positive potential source and bypassing the metal coated paper wire junction to avoid making a mark.

Claim 3

An improved method for controlling the firing of individual wires in a multi-wire print head to make marks on metal coated paper comprising the steps of: generating a first current from ground through the metal coated paper, a wire and a source of negative potential to make a mark; and generating a second current bypassing the wire metal coated paper boundary from a source of positive potential into a source of negative potential to avoid making a mark.

Claim 4

An improved method for controlling the firing of individual wires in a multi-wire print head to make marks on metal coated paper comprising the steps of: generating a first current from ground through the metal coated paper, a wire and a source of negative potential to make a mark; and generating a second current bypassing the wire metal coated paper boundary from a source of positive potential into a source of negative potential to avoid making a mark.

Claim 5

The method of claim 2 comprising the additional steps of: arranging the print wires in M groups of N wires each, M×N being equal to the total number of wires; providing N wire selection means, connected to a source of positive potential, each said wire selection means being connected to the correspondingly ordered wire N in each group M; and providing M group selection means, connected to a source of negative potential, each said group selection means being connected a different set of N wires.

Claim 7

A control circuit responsive to symbol generating means for a multi-wire printhead in contact with metal coated paper comprising: means for maintaining the paper at ground potential; a source of positive potential; first selectively operable means connecting said source of positive potential to each wire in said printhead; a source of negative potential; second selectively operable means connecting said source of negative potential to each wire in said printhead; means for generating a first current from the paper through a print wire into the negative potential said current being sufficient to vaporize the metal coating on the paper; and means for generating a second current from said positive potential to said negative potential, said current bypassing the print wire paper junction.

Claim 8

A control circuit responsive to symbol generating means for a multi-wire printhead in contact with metal coated paper comprising: means for maintaining the paper at ground potential; a source of positive potential; first selectively operable means connecting said source of positive potential to each wire in said printhead; a source of negative potential; second selectively operable means connecting said source of negative potential to each wire in said printhead; means for generating a first current from the paper through a print wire into the negative potential said current being sufficient to vaporize the metal coating on the paper; and means for generating a second current from said positive potential to said negative potential, said current bypassing the print wire paper junction.

Claim 9

The circuit of claim 5 wherein the print wires are arranged in M groups of N wires each.

Claim 10

The circuit of claim 6 wherein said first selectively operable means includes N transistors activated by circuit means responsive to said symbol generator means.

Claim 11

The circuit of claim 7 wherein each transistor 1-N is connected to all correspondingly positioned print wires in groups 1-M.

Claim 12

The circuit of claims 6, 7, or 8 wherein said second selectively operable means includes M transistors activated by circuit means responsive to said symbol generating means.

Claim 13

The circuit of claim 9 wherein said M transistors are each connected in parallel to a different set 1-M of N print wires.