Self-testing computer monitor

Claim 2

A self-testing computer monitor for receiving a signal from a computer which toggles at a preselected first frequency, said monitor comprising: (a) clock means adapted to receive a first frequency signal from a computer for producing periodic timing pulses; (b) test circuit means adapted to receive said periodic timing pulses for generating periodic test pulses; (c) bistable means adapted to receive said periodic timing pulses and adapted to receive said periodic test pulses for generating a second frequency in response to said timing pulses and said test pulses; (d) means adapted to receive said periodic test pulses and to compare said test pulses with the output of an oscillator for sensing if said preselected first frequency of said computer is toggling at a frequency outside a predetermined range of frequencies; and (e) means interconnecting said means for sensing and said bistable means for preventing one of said test pulses and said timing pulses from being coupled to said bistable means in response to said sensing means sensing that said first frequency is toggling at a frequency outside said range, whereby the generation of said second frequency by said bistable means indicates that the computer and the monitor have not failed.

Claim 3

The monitor according to claim 1 wherein said clock means produces timing pulses which are synchronized to the toggling of said first frequency.

Claim 4

The monitor according to claim 2 wherein said clock means comprises a one shot circuit which is triggered by the toggling of said first frequency.

Claim 5

The monitor according to claim 3 wherein said one shot circuit generates a timing pulse during each toggle of said first frequency thereby generating two pulses during each cycle of said first frequency.

Claim 6

The monitor according to claim 1 wherein said test circuit means generates test pulses which are synchronized to the toggling of said first frequency.

Claim 7

The monitor according to claim 5 wherein said test circuit means generates one test pulse for each cycle of said first frequency.

Claim 8

The monitor according to claim 6 wherein said test circuit means generates test pulses which are synchronized to said timing pulses.

Claim 9

The monitor according to claim 1 wherein said sensing means comprises an oscillator running at a preselected third frequency, and a means for comparing the difference in frequency between said third frequency and said first frequency.

Claim 10

The monitor according to claim 8 wherein said comparing means comprises a binary counter having a clock input and reset input, one of said clock input and said reset input coupled to said oscillator to receive said third frequency and the other coupled to said clock means for receiving said timing pulses.

Claim 11

The monitor according to claim 1 wherein said sensing means has a preselected range of frequencies selected such that said first frequency is at the approximate center frequency of said range.

Claim 12

The monitor according to claim 1 wherein said bistable means comprises a flip-flop having a clock input for receiving said timing pulses.

Claim 13

The monitor according to claim 11 wherein said flip-flop has another input for receiving said test pulses.

Claim 14

The monitor according to claim 1 wherein said preventing means comprises a latching means coupled to said sensing means for changing from a first state to a second state in response to said sensing means sensing that said first frequency is outside said preselected range, said latching means coupling one of said test pulses and timing pulses to said bistable means only while in said first state, thereby preventing the generation of said second frequency when said latching means is in said second state.

Claim 15

The monitor according to claim 13 wherein said latching means includes a relay having a coil and a first set of normally open contacts connected in series with said coil wherein said relay will latch in an unenergized state upon the opening of said first set of contacts, said first and second state of said latching means corresponding to said first contacts being closed and open, respectively.

Claim 16

The monitor according to claim 14 wherein said computer includes a process control output for providing process control data to a process controller, said relay including a second set of contacts connected in series between said process control output and said process controller wherein said second set of contacts prevents said data from being coupled to said process controller when said latching means is in the second state.

Claim 17

The monitor according to claim 14 further comprising a manually operable switch connected in parallel across said first set of contacts of said relay, whereby said switch can be manually closed to permit the coil of the relay to be initially energized.

Claim 18

The monitor according to claim 13 further comprising switch means coupled to said test circuit means and said sensing means for causing said latching means to change from its first state to its second state in response to said sensing means sensing said first frequency being outside said range.

Claim 19

The monitor according to claim 14 wherein said test pulses are coupled to said coil of said relay and to said bistable means, said test circuit means producing test pulses having a time duration which is less than the time required for said relay to drop-out, whereby said first set of relay contacts do not open in response to said test pulses.

Claim 20

In a process control system including a computer having a process output for supplying control data, a process controller adapted to receive said data, a computer monitor having an input for receiving a first signal from the computer which toggles at a first frequency and having an output for coupling a second signal to said computer and a process control switch for connecting the process output of said computer to said process controller, the improvements in the computer monitor comprising: (a) clock means adapted to receive said first frequency signal from a computer for producing periodic timing pulses; (b) test circuit means adapted to receive said periodic timing pulses for generating periodic test pulses; (c) means adapted to receive said periodic test pulses and to compare said test pulses with the output of an oscillator for sensing if said preselected first frequency of said computer is toggling at a frequency outside a predetermined range of frequencies; (d) latching means, coupled to said sensing means and coupled to said test circuit means for changing from a first state to a second state in response to said sensing means sensing that said first frequency signal from the computer is outside said preselected range, said latching means not changing from its first state to its second state in response to said test pulses, said latch means controlling said process control switch such that the computer process output is coupled to said process controller only when said latching means is in its first state; and (e) bistable means adapted to receive said periodic timing pulses and adapted to receive said periodic test pulses for generating said second signal having a second frequency in response to said test pulses and timing pulses only if said latch means is in its first state, whereby the sensing of said second frequency by the computer indicates that said computer and said monitor have not failed.

Claim 21

In a process control system including a computer having a process output for supplying control data, a process controller adapted to receive said data, a computer monitor having an input for receiving a first signal from the computer which toggles at a first frequency and having an output for coupling a second signal to said computer and a process control switch for connecting the process output of said computer to said process controller, the improvements in the computer monitor comprising: (a) clock means adapted to receive said first frequency signal from a computer for producing periodic timing pulses; (b) test circuit means adapted to receive said periodic timing pulses for generating periodic test pulses; (c) means adapted to receive said periodic test pulses and to compare said test pulses with the output of an oscillator for sensing if said preselected first frequency of said computer is toggling at a frequency outside a predetermined range of frequencies; (d) latching means, coupled to said sensing means and coupled to said test circuit means for changing from a first state to a second state in response to said sensing means sensing that said first frequency signal from the computer is outside said preselected range, said latching means not changing from its first state to its second state in response to said test pulses, said latch means controlling said process control switch such that the computer process output is coupled to said process controller only when said latching means is in its first state; and (e) bistable means adapted to receive said periodic timing pulses and adapted to receive said periodic test pulses for generating said second signal having a second frequency in response to said test pulses and timing pulses only if said latch means is in its first state, whereby the sensing of said second frequency by the computer indicates that said computer and said monitor have not failed.