Crypto microprocessor that executes enciphered programs

Claim 3

A cryptographic microprocessor apparatus constructed as an integrated circuit chip for executing a computer program of instructions received from a digital radio broadcast in enciphered form as a plurality of portions of enciphered information, the apparatus comprising: means for addressably storing a plurality of portions of said enciphered information received from a digital radio broadcast; means in said chip for storing a cipher key; deciphering means in said chip for cryptographically transforming a portion of said enciphered information under control of said cipher key to produce a portion of deciphered information; means in said chip for executing an instruction from a portion of said deciphered information; and means in said chip for addressing a successor portion of said enciphered information in said storing means for deciphering by said deciphering means.

Claim 4

A cryptographic microprocessor apparatus constructed as an integrated circuit chip for executing a computer program of instructions received from a digital radio broadcast in enciphered form as a plurality of portions of enciphered information, the apparatus comprising: means for addressably storing a plurality of portions of said enciphered information received from a digital radio broadcast; means in said chip for storing a cipher key; deciphering means in said chip for cryptographically transforming a portion of said enciphered information under control of said cipher key to produce a portion of deciphered information; means in said chip for executing an instruction from a portion of said deciphered information; and means in said chip for addressing a successor portion of said enciphered information in said storing means for deciphering by said deciphering means.

Claim 5

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: means for initiating reading of a portion of said enciphered information from said record carrier means; memory means for storing a portion of said enciphered information at a storage means location specified by a digital address; means for deciphering a portion of said enciphered information as a cryptographic function of its digital address to produce a portion of deciphered information; means for executing an instruction from said portion of deciphered information; and means for addressing a successor portion of said enciphered information for deciphering by said deciphering means.

Claim 6

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: means for initiating reading of a portion of said enciphered information from said record carrier means; memory means for storing a portion of said enciphered information at a storage means location specified by a digital address; means for deciphering a portion of said enciphered information as a cryptographic function of its digital address to produce a portion of deciphered information; means for executing an instruction from said portion of deciphered information; and means for addressing a successor portion of said enciphered information for deciphering by said deciphering means.

Claim 7

The system of claim 3, wherein said record carrier means is a disc-shaped body having an information bearing structure arranged in concentric tracks.

Claim 8

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: means for initiating reading of a portion of said enciphered information from said record carrier means; memory means for addressably storing said portion of enciphered information; means for storing a cipher key; means for deciphering a portion of said enciphered information under control of said cipher key to produce a portion of deciphered information; means for executing an instruction from said portion of deciphered information; and means for addressing a successor portion of said enciphered information in said storing means for deciphering by said deciphering means.

Claim 9

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: means for initiating reading of a portion of said enciphered information from said record carrier means; memory means for addressably storing said portion of enciphered information; means for storing a cipher key; means for deciphering a portion of said enciphered information under control of said cipher key to produce a portion of deciphered information; means for executing an instruction from said portion of deciphered information; and means for addressing a successor portion of said enciphered information in said storing means for deciphering by said deciphering means.

Claim 10

The system of claim 5, wherein said record carrier means is a disc-shaped body having an information bearing structure arranged in concentric tracks.

Claim 11

The system of claim 6, further comprising said disc-shaped body.

Claim 12

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: means for initiating reading of a portion of said enciphered information from said record carrier means; memory means for storing said portion of enciphered information at a storage means location specified by a digital address; and cryptographic microprocessor means for deciphering a portion of said enciphered information as a cryptographic function of its digital address to produce a portion of deciphered information, and for executing an instruction from said portion of deciphered information, and for addressing a successor portion of said enciphered information for deciphering.

Claim 13

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: means for initiating reading of a portion of said enciphered information from said record carrier means; memory means for storing said portion of enciphered information at a storage means location specified by a digital address; and cryptographic microprocessor means for deciphering a portion of said enciphered information as a cryptographic function of its digital address to produce a portion of deciphered information, and for executing an instruction from said portion of deciphered information, and for addressing a successor portion of said enciphered information for deciphering.

Claim 14

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered program information, the system comprising: means for specifying the digital address of a portion of said enciphered program information; means for deciphering said addressed portion of enciphered program information as a cryptographic function of said digital address to produce a portion of deciphered information containing an executable portion of an instruction; and microprocessor means for executing said instruction and for addressing a success portion of said enciphered program information for deciphering by said deciphering means.

Claim 15

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered program information, the system comprising: means for specifying the digital address of a portion of said enciphered program information; means for deciphering said addressed portion of enciphered program information as a cryptographic function of said digital address to produce a portion of deciphered information containing an executable portion of an instruction; and microprocessor means for executing said instruction and for addressing a success portion of said enciphered program information for deciphering by said deciphering means.

Claim 16

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered program information, the system comprising: means for specifying the digital address of a portion of said enciphered program information; means for storing a cipher key; means for deciphering said addressed portion of enciphered program information as a function of said digital address and under control of said cipher key to produce a portion of deciphered information containing an executable portion of an instruction; and microprocessor means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means.

Claim 17

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered program information, the system comprising: means for specifying the digital address of a portion of said enciphered program information; means for storing a cipher key; means for deciphering said addressed portion of enciphered program information as a function of said digital address and under control of said cipher key to produce a portion of deciphered information containing an executable portion of an instruction; and microprocessor means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means.

Claim 18

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: memory means for addressably storing a plurality of portions of said enciphered information, the location of each portion being specified by a digital address; means for storing a cipher key; means for deciphering a portion of said enciphered program information as a function of its digital address and under control of said cipher key to produce a portion of deciphered information containing an executable portion of an instruction; and microprocessor means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means.

Claim 19

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: memory means for addressably storing a plurality of portions of said enciphered information, the location of each portion being specified by a digital address; means for storing a cipher key; means for deciphering a portion of said enciphered program information as a function of its digital address and under control of said cipher key to produce a portion of deciphered information containing an executable portion of an instruction; and microprocessor means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means.

Claim 20

A cryptographic system of at least two microprocessors for executing computer programs of instructions stored in enciphered form as a plurality of portions of enciphered program information, the system comprising: memory means for addressably storing a plurality of portions of said enciphered program information; first microprocessor comprising: a. means for deciphering a portion of said enciphered program information to produce a portion of deciphered information containing an executable portion of an instruction, and b. means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means; second microprocessor connected to receive and process information from said first microprocessor; and bus means connecting said first and second microprocessors for conveying a portion of information between said microprocessors.

Claim 21

A cryptographic system of at least two microprocessors for executing computer programs of instructions stored in enciphered form as a plurality of portions of enciphered program information, the system comprising: memory means for addressably storing a plurality of portions of said enciphered program information; first microprocessor comprising: a. means for deciphering a portion of said enciphered program information to produce a portion of deciphered information containing an executable portion of an instruction, and b. means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means; second microprocessor connected to receive and process information from said first microprocessor; and bus means connecting said first and second microprocessors for conveying a portion of information between said microprocessors.

Claim 22

A cryptographic system of at least two microprocessors for executing computer programs of instructions stored in enciphered form as a plurality of portions of enciphered program information, the system comprising: memory means for addressably storing a plurality of portions of said enciphered program information; first microprocessor comprising: a. means for storing a cipher key, b. means for deciphering a portion of said enciphered program information under control of said cipher key to produce a portion of deciphered information containing an executable portion of an instruction, and c. means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means; second microprocessor means connected to receive and process information from said first microprocessor; and bus means connecting said first and second microprocessors for conveying a portion of information between said microprocessors.

Claim 23

A cryptographic system of at least two microprocessors for executing computer programs of instructions stored in enciphered form as a plurality of portions of enciphered program information, the system comprising: memory means for addressably storing a plurality of portions of said enciphered program information; first microprocessor comprising: a. means for storing a cipher key, b. means for deciphering a portion of said enciphered program information under control of said cipher key to produce a portion of deciphered information containing an executable portion of an instruction, and c. means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means; second microprocessor means connected to receive and process information from said first microprocessor; and bus means connecting said first and second microprocessors for conveying a portion of information between said microprocessors.

Claim 24

A cryptographic system of at least two microprocessors for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered program information, the system comprising: means of initiating reading of a portion of said enciphered program information from said record carrier means; memory means for addressably storing a plurality of portions of said enciphered program information read from said record carrier means; first microprocessor comprising: a. means for storing a cipher key, b. means for deciphering a portion of said enciphered program information under control of said cipher key to produce a portion of deciphered information containing an executable portion of an instruction, and c. means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means; second microprocessor means connected to receive and process information from said first microprocessor; and bus means connecting said first and second microprocessors for conveying a portion of information between said microprocessors.

Claim 25

A cryptographic system of at least two microprocessors for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered program information, the system comprising: means of initiating reading of a portion of said enciphered program information from said record carrier means; memory means for addressably storing a plurality of portions of said enciphered program information read from said record carrier means; first microprocessor comprising: a. means for storing a cipher key, b. means for deciphering a portion of said enciphered program information under control of said cipher key to produce a portion of deciphered information containing an executable portion of an instruction, and c. means for executing said instruction and for addressing a successor portion of said enciphered program information for deciphering by said deciphering means; second microprocessor means connected to receive and process information from said first microprocessor; and bus means connecting said first and second microprocessors for conveying a portion of information between said microprocessors.

Claim 26

The system of claim 14, wherein said record carrier means is a disc-shaped body having an information bearing structure arranged in concentric tracks.

Claim 27

A cryptographic microprocessor apparatus for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered information, the sytem comprising: means for storing a plurality of cipher keys; means for selecting a deciphering key from said plurality of cipher keys; means for deciphering a portion of said enriched information under control of said deciphering key to produce a portion of deciphered program information; means for executing an instruction from said portion of deciphered program information; and means for addressing a successor portion of said enciphered information for deciphering by said deciphering means.

Claim 28

A cryptographic microprocessor apparatus for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered information, the sytem comprising: means for storing a plurality of cipher keys; means for selecting a deciphering key from said plurality of cipher keys; means for deciphering a portion of said enriched information under control of said deciphering key to produce a portion of deciphered program information; means for executing an instruction from said portion of deciphered program information; and means for addressing a successor portion of said enciphered information for deciphering by said deciphering means.

Claim 29

A cryptographic microprocessor apparatus for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered information, the system comprising: means for specifying the digital address of a portion of said enciphered information; means for storing a plurality of cipher keys; means for selecting a deciphering key from said plurality of cipher keys; means for deciphering said addressed portion of enciphered information as a function of said digital address under control of said deciphering key to produce a portion of deciphered program information; means for executing an instruction from said portion of deciphered program information; and means for addressing a successor portion of said enciphered information for deciphering by said deciphering means.

Claim 30

A cryptographic microprocessor apparatus for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered information, the system comprising: means for specifying the digital address of a portion of said enciphered information; means for storing a plurality of cipher keys; means for selecting a deciphering key from said plurality of cipher keys; means for deciphering said addressed portion of enciphered information as a function of said digital address under control of said deciphering key to produce a portion of deciphered program information; means for executing an instruction from said portion of deciphered program information; and means for addressing a successor portion of said enciphered information for deciphering by said deciphering means.

Claim 31

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: means for initiating reading of a portion of said enciphered information from said record carrier means; memory means for addressably storing said portion of enciphered information; means for storing a plurality of cipher keys; means for selecting a deciphering key from said plurality of cipher keys; means for deciphering a portion of said enciphered information under control of said deciphering key to produce a portion of deciphered information; means for executing an instruction from said portion of deciphered information; and means for addressing a successor portion of said enciphered information in said memory means for deciphering by said deciphering means.

Claim 32

A cryptographic microprocessor system for executing computer programs of instructions stored in enciphered form on a record carrier means as a plurality of portions of enciphered information, the system comprising: means for initiating reading of a portion of said enciphered information from said record carrier means; memory means for addressably storing said portion of enciphered information; means for storing a plurality of cipher keys; means for selecting a deciphering key from said plurality of cipher keys; means for deciphering a portion of said enciphered information under control of said deciphering key to produce a portion of deciphered information; means for executing an instruction from said portion of deciphered information; and means for addressing a successor portion of said enciphered information in said memory means for deciphering by said deciphering means.

Claim 35

A cryptographic microprocessor for executing a computer program of instructions stored in enciphered form as a plurality of addressable portions of enciphered program information, each addressable portion having a digital address, the apparatus comprising: means for addressing a portion of said enciphered program information; deciphering means for cryptographically combining said addressed portion of information with the digital address of the addressed portion and for cryptographically transforming the addressed portion to produce a deciphered operation code in said program; processing means for decoding said deciphered operation code, and for executing the decoded operation code, and for addressing a subsequent portion of said enciphered program information for transforming by said deciphering means.

Claim 36

A cryptographic microprocessor for executing a computer program of instructions stored in enciphered form as a plurality of addressable portions of enciphered program information, each addressable portion having a digital address, the apparatus comprising: means for addressing a portion of said enciphered program information; deciphering means for cryptographically combining said addressed portion of information with the digital address of the addressed portion and for cryptographically transforming the addressed portion to produce a deciphered operation code in said program; processing means for decoding said deciphered operation code, and for executing the decoded operation code, and for addressing a subsequent portion of said enciphered program information for transforming by said deciphering means.

Claim 37

The apparatus of claim 20, wherein every bit in said deciphered operation code is a function of at least four bits in said digital address.

Claim 38

A cryptographic microprocessor apparatus for executing computer programs of instructions addressably stored in enciphered form as portions of enciphered program information, the apparatus comprising: deciphering means for cryptographically transforming a portion of said enciphered program information to produce a deciphered instruction in a program; processing means for executing said deciphered instruction to produce an address of a successor instruction; and means for addressing a portion of said addressably stored enciphered information which contains said successor instruction in enciphered form and which said deciphering means transforms to deciphered form.

Claim 39

A cryptographic microprocessor apparatus for executing computer programs of instructions addressably stored in enciphered form as portions of enciphered program information, the apparatus comprising: deciphering means for cryptographically transforming a portion of said enciphered program information to produce a deciphered instruction in a program; processing means for executing said deciphered instruction to produce an address of a successor instruction; and means for addressing a portion of said addressably stored enciphered information which contains said successor instruction in enciphered form and which said deciphering means transforms to deciphered form.

Claim 40

The apparatus of claim 22, wherein said portions of enciphered program information are received from a digital broadcast of electro-magnetic radiation such as a radio broadcast.

Claim 41

The apparatus of claim 22 further comprising means for reading portions of said enciphered information from a disc-shaped record carrier means.

Claim 42

A cryptographic microprocessor apparatus for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered program information, each portion being stored at a memory location specified by a digital address, the apparatus comprising: addressing means for specifying the digital address of a portion of said enciphered program information; deciphering means for cryptographically transforming said addressed portion of information as a function of said specified digital address to produce a deciphered instruction in a program; and processing means for executing said deciphered instruction to produce an address of a successor instruction, said addressing means further addressing a portion of said enciphered program information which contains said successor instruction in enciphered form.

Claim 43

A cryptographic microprocessor apparatus for executing computer programs of instructions stored in enciphered form as addressable portions of enciphered program information, each portion being stored at a memory location specified by a digital address, the apparatus comprising: addressing means for specifying the digital address of a portion of said enciphered program information; deciphering means for cryptographically transforming said addressed portion of information as a function of said specified digital address to produce a deciphered instruction in a program; and processing means for executing said deciphered instruction to produce an address of a successor instruction, said addressing means further addressing a portion of said enciphered program information which contains said successor instruction in enciphered form.

Claim 44

In an improved microprocessor apparatus fabricated as an integrated circuit chip having an electrically alterable memory for storing a plurality of executable program instructions and processing circuitry for fetching program instructions from said memory and for executing the fetched instructions and for addressing in said memory successor instructions, and an external conductor for controlling loading of a predetermined number of integers into electrically alterable memory means in said chip, the improvement for protecting program instructions in said chip comprising: storing means in said chip for storing an indication of a set or reset condition, one condition enabling reading from said memory means and the other condition disabling reading from said memory means; means in said chip for setting said storing means after said integers are loaded into said memory means; means in said chip for disabling loading of additional integers into said memory means in response to said storing means storing an indication of a set condition; and means in said chip for disabling external access to said memory means in response to said storing means storing an indication of a set condition.

Claim 45

In an improved microprocessor apparatus fabricated as an integrated circuit chip having an electrically alterable memory for storing a plurality of executable program instructions and processing circuitry for fetching program instructions from said memory and for executing the fetched instructions and for addressing in said memory successor instructions, and an external conductor for controlling loading of a predetermined number of integers into electrically alterable memory means in said chip, the improvement for protecting program instructions in said chip comprising: storing means in said chip for storing an indication of a set or reset condition, one condition enabling reading from said memory means and the other condition disabling reading from said memory means; means in said chip for setting said storing means after said integers are loaded into said memory means; means in said chip for disabling loading of additional integers into said memory means in response to said storing means storing an indication of a set condition; and means in said chip for disabling external access to said memory means in response to said storing means storing an indication of a set condition.

Claim 46

The apparatus of claim 26, wherein said storing means is set in response to a signal on said external conductor.

Claim 47

The apparatus of claim 26, wherein said storing means is set in response to a sequence of codes communicated to said chip.

Claim 48

The apparatus of claim 26, further comprising an internal program for loading said electrically alterable memory means.

Claim 49

In an improved microprocessor apparatus fabricated as an integrated circuit chip having an electrically alterable memory for storing a plurality of executable program instructions and processing circuitry for fetching program instructions from said memory and for executing the fetched instructions and for addressing successor instructions in said memory, and an external conductor for controlling loading of a predetermined number of integers into electrically alterable memory means in said chip, the improvement for protecting program instructions in said chip comprising: setable means in said chip having either a set state or a reset state, one state enabling reading from said memory means; means in said chip for setting said setable means after said integers are loaded into said memory means and in response to bits input on said external conductor; means in said chip for disabling subsequent commands in response to the state of said setable means; and means in said chip for disabling external access to said memory means in response to the state of said setable means.

Claim 50

In an improved microprocessor apparatus fabricated as an integrated circuit chip having an electrically alterable memory for storing a plurality of executable program instructions and processing circuitry for fetching program instructions from said memory and for executing the fetched instructions and for addressing successor instructions in said memory, and an external conductor for controlling loading of a predetermined number of integers into electrically alterable memory means in said chip, the improvement for protecting program instructions in said chip comprising: setable means in said chip having either a set state or a reset state, one state enabling reading from said memory means; means in said chip for setting said setable means after said integers are loaded into said memory means and in response to bits input on said external conductor; means in said chip for disabling subsequent commands in response to the state of said setable means; and means in said chip for disabling external access to said memory means in response to the state of said setable means.