US4450462A
Expired / Lapsed
US
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GaAs Field effect transistor with a non-volatile memory
Assignee: Thales SA
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Filing: 1981-08-19
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Granted: 1984-05-22
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Expires: 2001-08-19
Abstract
Abstract The invention relates to field effect transistors having a non-volatile memory effect of the MIS type. According to the invention the transistor comprises, in addition to substrate (17), a source (21), a drain (22), a grid formed by a semi-insulating film (18) and an insulating layer (19), whose semi-insulating film (18) has a thickness below 100 angstroms and is formed from a semiconductive material of groups III-V having a broader forbidden band than that of the active layer (16) on which it is deposited. Useful applications of the invention include ultra-high frequency transistors for telecommunications.
Inventors
- 👤 Trong L. Nuyen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:09
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/69
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
140 words
A field effect transistor with a non-volatile memory effect, comprising: supported by a semi-insulating substrate, two access regions called the source and the drain, respectively and a control region constituted by an active layer on said substrate and by a control grid on said active layer and itself formed by a semi-insulating layer in contact with the active layer and an insulating layer on said semi-insulating layer in contact with a control metallization, wherein the semi-insulating layer has a thickness below 100 angstroms so as to permit the passage of electrons by the tunnel effect and wherein it is made from a material from the group of III-V semiconductors having a broader forbidden band than that of the material forming the active layer and having a structure and crystalline parameters close to those of the material of said active layer.
Claim 2
Dependent Claim
140 words
A field effect transistor with a non-volatile memory effect, comprising: supported by a semi-insulating substrate, two access regions called the source and the drain, respectively and a control region constituted by an active layer on said substrate and by a control grid on said active layer and itself formed by a semi-insulating layer in contact with the active layer and an insulating layer on said semi-insulating layer in contact with a control metallization, wherein the semi-insulating layer has a thickness below 100 angstroms so as to permit the passage of electrons by the tunnel effect and wherein it is made from a material from the group of III-V semiconductors having a broader forbidden band than that of the material forming the active layer and having a structure and crystalline parameters close to those of the material of said active layer.
Claim 3
Dependent Claim
62 words
A field effect transistor according to claim 1, wherein the active layer material is gallium arsenide, GaAs, the semi-insulating layer material is chosen from: Ga x In 1-x P, Al x In 1-x P, AlP x Sb 1-x , Al x Ga 1-x As, Al x Ga 1-x P y Sb 1-y , Ga x In 1-x P y Sb 1-y .
Claim 4
Dependent Claim
49 words
A field effect transistor according to claim 1, wherein as the active layer material is chosen from indium phosphide InP or Ga x In 1-x As, the semi-insulating layer material is chosen from among AlAs x Sb 1-x , AlP x Sb 1-x , Al x In 1-x As.
Claim 5
Dependent Claim
40 words
A field effect transistor according to claim 1, wherein the active layer undergoes N-type doping at 5.10 16 to 10 17 at.cm 3 , has a thickness between 1000 and 2000 angstroms and extends under the source and drain regions.
Claim 6
Dependent Claim
55 words
A field effect transistor according to claim 1, wherein the active layer undergoes N-type doping at 5.10 16 to 10 17 at/cm 3 , has a thickness below 1000 angstroms and is in contact with two boxes N + doped to a level above 10 18 at/cm 3 formed in the thickness of the substrate.
Claim 7
Dependent Claim
19 words
A field effect transistor according to claim 5, wherein the boxes are also in contact with the semi-insulating layer.
Claim 8
Dependent Claim
28 words
A field effect transistor according to claim 5, wherein the active layer projects with respect to the substrate, which it penetrates and is in contact with the boxes.
Claim 9
Dependent Claim
23 words
A field effect transistor according to claim 1, wherein the active layer is doped to a level below 10 14 at/cm 3 .
Claim 10
Dependent Claim
19 words
A field effect transistor according to claim 1, wherein the metallization of the grid partly covers the insulating layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-05-22 | 1987-11-21 | 1988-05-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-05-22 | 1991-11-21 | 1992-05-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-05-22 | 1995-11-21 | 1996-05-22 | $7700.00 | Window Closed / Lapsed |